Fujitsu MB86R02 Jade-D Hardware Manual page 436

Graphics controller
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MB86R02 'Jade-D' Hardware Manual V1.64
L1EM (L1 layer Extended Mode)
Register
DisplayBaseAddress + 0x120
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit field name
L1EC Reserved
R/W
RW
Initial value
Bit 23 to 20
L1PB (L1 layer Palette Base)
Shows the value added to the index when subtracting palette of L1 layer. 16 times of
setting value is added.
Bit 25 to 24
L1DM (L1 layer Display Magnify Mode)
00
01
10
11
Bit 31 and 30
L1EC (L1 layer Extended Color mode)
Sets extended color mode for L1 layer
00
01
10
11
L1DA (L1 layer Display Address)
Register
DisplayBaseAddress + 0x34
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
Reserved
R/W
Initial value
This register sets the display origin address of the L1 layer. For the direct color mode (16 bits/pixel),
the lower 1 bit is "0" and this register is treated as being aligned in 2 bytes. Wraparound processing
is not performed for the L1 layer, so the frame origin linear address and display position (X
coordinates and Y coordinates) are not specified.
L1WX (L1 layer Window position X)
Register
DisplayBaseAddress + 0x124 (DisplayBaseAddress + 0x18)
address
Bit number
15
Bit field name
Reserved
R/W
Initial value
This register sets the X coordinates of the display position of the L1 layer window. This register is
placed in two address spaces. The parenthesized address is the register address to maintain
compatibility with previous products. The same applies to L1WY, L1WW and L1WH.
18-78
DM
L1PB
R0
RW
0
Normal Mode (no scaling or shrink scaling)
Reserved
Magnify Scaling
Reserved
Mode determined by L1C (8/16 ARGB)
Direct color (24 bits/pixel) mode ARGB
16bpp RGBA
24 bpp RGBA
R0
0
14
13
12
11
10
R0
0
Reserved
R0
L1DA
RW
X
9
8
7
6
5
L1WX
RW
X
− − −
4 3 2
1
0
0
4
3
2
1
0

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