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MB86R02 'Jade-D' Hardware Manual V1.64
25.7.9
PWMx interrupt register (PWMxIR)
This register is to select cause of PWM interrupt.
Address
Bit
31
30
29
Name
R/W
R
R
R
Initial value
0
0
0
Bit
15
14
13
Name
(Reserved)
R/W
R
R
R
Initial value
0
0
0
Bit field
No.
Name
31-10
(Reserved)
9-8
INTREP[1:0]
7-1
(Reserved)
0
DONE
25-12
ch0：FFF4_1000 + 1C
ch1：FFF4_1100 + 1C
ch2：FFF4_6000 + 1C
ch3：FFF4_6100 + 1C
ch4：FFF4_7000 + 1C
ch5：FFF4_7100 + 1C
ch6：FFF4_8000 + 1C
ch7：FFF4_8100 + 1C
28
27
26
25
R
R
R
R
0
0
0
0
12
11
10
9
INTREP[1:0
R
R
R
R/W R/W
0
0
0
0
Reserved bits.
Write access is ignored. The read value of these bits is always "0".
The bit (DONE bit) which might be the cause of PWM interrupt is selected.
INTREP[1:0]
00
DONE bit is not selected
01
DONE bit is selected as cause of interrupt factor
10
(Setting prohibited)
11
(Setting prohibited)
Reserved bits.
Write access is ignored. The read value of these bits is always "0".
This bit indicates end of 1 pulse cycle.
0 1 pulse is not output (initial value)
1 1 pulse is output
This bit is cleared to "0" by writing "1".
H
H
H
H
H
H
H
H
24
23
22
21
(Reserved)
R
R
R
R
0
0
0
0
8
7
6
5
(Reserved)
]
R
R
R
0
0
0
0
Description
Possible cause bit for PWM interrupt
20
19
18
17
R
R
R
R
0
0
0
0
4
3
2
1
DONE
R
R
R
R/W1 R/W1
0
0
0
0
16
R
0
0
0
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