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MB86R02 'Jade-D' Hardware Manual V1.64
Field name
R/W
Reset value
Bit 30 - 0
SPGMKON8
Mask bits: 0b=include bit in position matching, 1b= do not include this bit in position matching
DIR_SPG8PosOff
Register address
BaseAddress + 48C
Bit number
31
Field name
SPGPSOFF_TOGGLE8
R/W
RW
Reset value
0
Sync pulse generator 8, 'Switch off' position
Bit 31
SPGPSOFF_TOGGLE8
Toggle enable: 0b=disable, 1b=enable
Bit 30 - 16
SPGPSOFF_X8
X scan position
Bit 15
Reserved
Do not modify
Bit 14 - 0
SPGPSOFF_Y8
Y scan position
DIR_SPG8MaskOff
Register address
BaseAddress + 490
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field name
R/W
Reset value
Bit 30 - 0
SPGMKOFF8
Mask bits: 0b=include bit in position matching, 1b= do not include this bit in position matching
DIR_SPG9PosOn
Register address
BaseAddress + 494
Bit number
31
Field name
SPGPSON_TOGGLE9
R/W
RW
Reset value
0
H
Sync pulse generator 9, 'Switch on' position
Bit 31
SPGPSON_TOGGLE9
Toggle enable: 0b=disable, 1b=enable
Bit 30 - 16
SPGPSON_X9
X scan position
Bit 15
Reserved
Do not modify
Bit 14 - 0
SPGPSON_Y9
Y scan position
DIR_SPG9MaskOn
Register address
BaseAddress + 498
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field name
R/W
Reset value
Bit 30 - 0
SPGMKON9
Mask bits: 0b=include bit in position matching, 1b= do not include this bit in position matching
DIR_SPG9PosOff
Register address
BaseAddress + 49C
Bit number
31
Field name
SPGPSOFF_TOGGLE9
R/W
RW
Reset value
0
22-14
H
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
SPGPSOFF_X8
H
H
H
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
SPGPSON_X9
H
H
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
SPGPSOFF_X9
H
SPGMKON8
RW
0
H
15
Reserved
RW
RW
0
0
H
SPGMKOFF8
RW
0
H
15
Reserved
RW
RW
0
0
H
H
SPGMKON9
RW
0
H
15
Reserved
RW
RW
0
0
H
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SPGPSOFF_Y8
RW
0
H
H
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SPGPSON_Y9
RW
0
H
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SPGPSOFF_Y9
RW
0
H
H
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