Gpio Signal Timing - Fujitsu MB86R02 Jade-D Hardware Manual

MB86R02 'Jade-D' Hardware Manual V1.64
34.5.3

GPIO Signal Timing

Table 34-22 AC Timing
Signal Symbol
t
do
GPIO_PD[23:0]
t
dw
Internal clock is the standard of output delay.
A indicates APB bus clock cycle, and it is different from the output delay standard clock.
Internal CLK
Output
GPIO_PD[23:0]
Input
Figure 34-18 GPIO Timings
34-24
Description
Data output delay time
Input data-width
t
do
Min.
–
A
t
dw
Value
Unit
Typ. Max.
– 13 ns
– – Ns