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MB86R02 'Jade-D' Hardware Manual V1.64
V1.20
22.06.2009
V1.10
18.05.2009
V1.00
12.03.2009
CRG: modified description of DPERI register
von Treuberg
CCNT: Page 9-12: corrected typo ADC7 > ADC2
GDC: VCCR register – changed reset value. Corrected table of
DCKD clock delay values and DCM3 description.
APIX: Changed names OscMode, OscBias, OscFilter to
OSC_MODE, OSC_BIAS and OSC_FILTER for consistancy. -
Added upstream channel bandwith limitation
IRC: Added info to IRQ7,8,19,20 ... 23: Unused, corresponding
correction to IRQ table (9.6)
EXTBUS: changed footnote of MCFMODE0/2/4
TCON: Removed superflous section concerning Indigo.
Exchanged block diagram of TSIG (22-4). Modified diagram
'Basic structure of a sync mixer (22-7).
DDR2: corrected flowchart and tables 13-4, 13-6, corrected
13.6.2.2 flow chart and added new explanation text. Added
limitation about read/write when in self-refresh mode.
Corrected 13.7.2.2 OCD Adjustment Procedure, changed
bitfield ODTBIAS in register DROABA.
SSCG: numerous small corrections. Removed references to
1.6 GHz operation (not for Jade-D implementation)
Addendum: added difference in SSCG functional scope
ES1/ES2
DMAC/I2S: added restriction for I2S transfer modes
SIG: Added new example control flow diagram to 21.6.1
Added new chapter 'Electrical Characteristics'
von Treuberg
Overview: corrected bus connection information, added
improved overview of multiplex pin groups, corrected I2S unit
count, added section concerning PU/PD differences ES1/ES2,
updated pin listings/unused pins info
SPI: Added second channel
GDC: corrected display timing table values, added 1280 x 480
GDC: correcrected address offsets of L2WY, L2WW, L2WH
GDC: Modified DCM3 register
GDC: Added DCM1.LCS register description
GDC: Corrected RSDS bitfield initial value (DCM0 register)
CCNT: Renamed register CDEBUG0 > CBSC
CCNT: Renamed register CDEBUG1 > CDCRC
CCNT: Added new register CMSR2
CCNT: Corrected numbers of CMBUS register bitfields
CRG: Minimal register description changes
ADC: Corrected ADC channel mapping table, updated register
description
Added Addendum for differences ES1/ES2
IRC: Added missing registers for IRC2 to overview, corrected
TBR addresses in tables
CLUT: updated diagrams
DITH: updated diagrams
SIG: updated diagrams
TCON: updated diagrams
RLD: updated diagrams
von Treuberg
Overview: Unused pins: changed handling of I2S_ECLK, VPD,
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