Basic Operation Flow - Fujitsu MB86R02 Jade-D Hardware Manual

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MB86R02 'Jade-D' Hardware Manual V1.64

26.10 Basic operation flow

Basic operation flow of ADC is shown below.

Set of ADCxCKSEL

Write "0x0 - 0x7" to ADCxCKSEL register

Set of ADCxMODE

Write "0x0 - 0x2" to ADCxMODE register

Set of ADCxXPD

Write "0x1" to ADCxXPD register

(The polling of data starts)

After 16 ADC clocks, analog data is converted into digital

In ADCxMODE = 2'b10 the wo inputs are sampled

interleaved.

Set converted A/D data to ADCxDATA register. (A range of

data is "0x0 - 0x3FF")

The value of ADCxSTATUS register doesn't change if

ADCxSTATUS register is "0x1".

If ADCxSTATUS register is "0x0", the value of

ADCxSTATUS register becomes "0x1".

In ADCxMODE = 2'b10 the two inputs are sampled

interleaved.

Set of ADCxSTATUS

Write "0x0" to ADCxSTATUS register

* The data value is updated

only every 16 ADC clocks

though ADCxDATA register

can be read at any time.

In mode = 2'b10 every data

result is only sampled every

32 ADC clock cycles.