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MB86R02 'Jade-D' Hardware Manual V1.64
34.4.4
I2C Bus Fast Mode I/O
2
Table 34-16 I
C I/O DC Characteristics
Parameter & Condition
"L" level input voltage
"H" level input voltage
Schmitt trigger hysteresis
VDDE > 2[v]
"L" level output voltage
Sink current 3[mA]
VDDE > 2[v]
Output slew rate (Tfall)
Bus capacitance 10[pF] ~ 400[pF]
VIH (min.) to VIL (max.)
Data line leakage
Input voltage 0.1 ~ 0.9 VDDE
(max.)
I/O pin capacitance
2
*1: The I
C Bus Fast Mode I/O buffer is downward compatible with standard mode.
*2: 90nm Technology: Complies with the maximum ratings 4[V].
*3: Cb: Capacitance for 1 bus line (Unit: pF).
2
*4: The I
C Bus Fast Mode I/O buffer itself has no function to prevent spike of 50ns pulse width (max.).
Therefore, provide any input filter to prevent spike for both internal and external semiconductor device.
Note:
External pin for I
I2C_SCL0, I2C_SDA0, I2C_SCL1, I2C_SDA1
34-14
Standard Mode
Symbol
Min.
VIL
-0.5
VIH
0.7 VDDE
Vhys
n/a
VOL1
0
tof
–
Ii
-10
Ci
–
2
C IO buffer is as follows.
Fast Mode (*1)
Max.
Min.
0.3 VDDE
-0.5
(*2)
0.7 VDDE
n/a
0.05 VDDE
0.4
0
250
20 + 0.1Cb
(*3)
10
-10
10
–
Unit
Max.
0.3 VDDE
V
(*2)
V
–
V
0.4
V
250
ns
µA
10
10
pF
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