Sw Reset; Rsds Bitmap Mdule (Rbm) - Fujitsu MB86R02 Jade-D Hardware Manual

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MB86R02 'Jade-D' Hardware Manual V1.64
22.5.2.2

SW Reset

The software reset is invoked by writing to its register. The software reset synchronizes all internal
states. After power on reset the TCON module remains in this "sw reset active" state.
It is deasserted by internal logic synchronous to internal video synchronization signals, that means
last pixel of video frame (inclusive blanking). After configuring TCON it is therefore necessary to setup
the video frame (HTP, VTP, HDP, VDP) in module DISP to provide a valid video frame to TCON
module. Otherwise no RGB and display clock data is output.
Configuration registers are not reseted by SW reset, only internal states of TCON.
22.5.2.3

RSDS Bitmap Mdule (RBM)

22.5.2.3.1
Block Diagram
The following block diagram shows the functional design of the RBM module.
Figure 22-3 Block diagram of RBM
22.5.2.3.2
Bit Mapping
RSDS
8bpc
Ch0
Ch1
Ch2
Ch3
Ch4
Ch5
Ch6
Ch7
Ch8
Ch9
Ch10
Ch11
22-30
Rising
R0
R2
R4
R6
G0
G2
G4
G6
B0
B2
B4
B6
Falling
R1
R3
R5
R7
G1
G3
G5
G7
B1
B3
B5
B7

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