Remap Boot Controller (Rbc); Outline; Features; Block Diagram - Fujitsu MB86R02 Jade-D Hardware Manual

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MB86R02 'Jade-D' Hardware Manual V1.64

8 Remap Boot Controller (RBC)

This chapter describes the functionality and operation of the Remap Boot Controller (RBC).

8.1 Outline

The RBC is an APB slave module. It provides system boot operation control and controls the
remap sequence of the system, the VINITHI signal of ARM926EJ-S
for an exception vector address change and ITCM reboot after power-on reset.
8.2

Features

The RBC has the following features:
• Remap control register
• INITRAM signal control register
• VINITHI signal control register
8.3

Block Diagram

Figure 8-1 shows the RBC block diagram.
APB signals
HRESETn
(from CRG)
(from CRG)
VINITHI
(from pin)
Table 8-1 shows RBC's external port functions.
Table 8-1 RBC external port function list
Signal name
I/O Description
VINITHI
I
RBC
Remap
control register
INITRAM
CRSTn
control
register
VINITHI
control
register
Figure 8-1 RBC block diagram
Default value of output port, VINITHI
TM
and the INITRAM signal
REMAP
(to BusMatrix)
INITRAM
ARM926EJ-S core
(to
)
VINITHI
ARM926EJ-S core
(to
)
8-1

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