Registers; Register List - Fujitsu MB86R02 Jade-D Hardware Manual

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MB86R02 'Jade-D' Hardware Manual V1.64

27.6 Registers

This section describes I2S register.

All registers of I2S correspond to access in byte (8 bit), half word (16 bit), and word (32 bit.)

Reception FIFO data register

Transmission FIFO data register

Control register

Channel control register 0

Channel control register 1

Channel control register 2

Operation control register

Software reset register

Interrupt control register

STATUS register

DMA start-up register