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MB86R02 'Jade-D' Hardware Manual V1.64
11.6.4 Memory controller error register (MCERR)
Register address
Bit No.
31
Bit field name
R/W
Initial value
Bit No.
15
Bit field name
R/W
Initial value
Bit31-4: Reserved
Reserved bits.
Write "0" to these bits. Their value is undefined.
Bit3: Reserved
Reserved bit.
Write "0" to these bits. Their value is undefined.
Note:
Writing "1" to this bit is prohibited.
Bit2: SFION (SRAM/Flash error interrupt: ON)
This bit validates interrupt at SRAM/Flash error.
0:
1:
Bit1: Reserved
Reserved bit.
Write 0 to these bits. Their value is undefined.
Bit0: SFER (SRAM/Flash error)
This bit indicates that the area without mapping is accessed. In this case, memory
controller returns error to internal bus; at the same time, this bit, is set.
When the value is "1", it is cleared by writing "0" Only when "1" is set to this bit, clear
operation is available.
0:
1:
30
29
28
27
26
14
13
12
11
10
Reserved
R/W0
OFF (initial value)
ON
No error (Initial value)
Error
BaseAddress + 0x0200
25
24
23
22
21
Reserved
R/W0
X
9
8
7
6
5
X
20
19
18
17
16
4
3
2
1
0
SFIO
Reserved
Reserved SFER
N
R/W0
R/W
R
R/W0
0
0
0
0
11-11
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