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MB86R02 'Jade-D' Hardware Manual V1.64
- 0
Do not modify
T1CFG0
Register address
BaseAddress + 44
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field name
T1_config_byte_4
R/W
Reset value
channel 1 TX APIX configuration byte 1-4
Bit 31 - 24
T1_config_byte_4
apix config byte, see section 17.4
Bit 23 - 16
T1_config_byte_3
apix config byte, see section 17.4
Bit 15 - 8
T1_config_byte_2
apix config byte, s see section 17.4
Bit 7 - 0
T1_config_byte_1
(none)
T1CFG1
Register address
BaseAddress + 48
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field name
T1_config_byte_8
R/W
Reset value
channel 1 TX APIX configuration byte 5-8
Bit 31 - 24
T1_config_byte_8
apix config byte, see section 17.4
Bit 23 - 16
T1_config_byte_7
apix config byte, see section 17.4
Bit 15 - 8
T1_config_byte_6
apix config byte, see section 17.4
Bit 7 - 0
T1_config_byte_5
(none)
T1CFG2
Register address
BaseAddress + 4C
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field name
R/W
Reset value
channel 1 TX APIX configuration byte 9-11
Bit 31 - 24
Reserved
Do not modify
Bit 23 - 16
T1_config_byte_11
apix config byte, see section 17.4.
Bit 15 - 8
T1_config_byte_10
apix config byte, see section 17.4
Bit 7 - 0
T1_config_byte_9
(none)
T1CFG3
Register address
BaseAddress + 50
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7
Field name
T1_config_byte_shell_4
R/W
Reset value
channel 1 TX APIX SHELL configuration byte1-4
Bit 31 - 24
T1_config_byte_shell_4
apix config byte, see section 17.4
Bit 23 - 16
T1_config_byte_shell_3
apix config byte, see section 17.4
Bit 15 - 8
T1_config_byte_shell_2
apix config byte, see section 17.4
Bit 7 - 0
T1_config_byte_shell_1
(none)
H
T1_config_byte_3
RW
91
H
H
T1_config_byte_7
RW
12
H
H
Reserved
T1_config_byte_11
RWS
0
H
H
T1_config_byte_shell_3
RW
RW
0
9A
H
T1_config_byte_2
RW
0
H
T1_config_byte_6
RW
C7
H
T1_config_byte_10
RW
40
H
T1_config_byte_shell_2
RW
A2
H
H
T1_config_byte_1
RW
RW
FE
F0
H
H
T1_config_byte_5
RW
RW
33
24
H
H
T1_config_byte_9
RW
RW
2
2
H
H
6
5
4
3
2
T1_config_byte_shell_1
RW
26
H
1
0
17-11
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