Fujitsu MB86R02 Jade-D Hardware Manual page 487

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MB86R02 'Jade-D' Hardware Manual V1.64
CLPF (Capture Low Pass Filter)
Register address
Bit number
Bit field name
R/W
Initial value
This register sets the Low Pass Filter Coefficient. The vertical low pass filter consists of FIR filters
of three taps. The horizontal low pass filter consists of FIR filters of five taps. It specifies
independently in 2-bit coefficient code with a
and Cr) . A low pass filter is OFF (through) in a setup of each coefficient code "00".
Bit 17 to 16
Bit 19 to 18
Bit 25 to 24
Bit 27 to 26
Note: In the case of Native RGB mode (NRGB=1), only a setup of CVLPF_Y code becomes
effective.
CMSS (Capture Magnify Source Size)
Register address
Bit number
Bit field name
CaptureBaseAddress + 40h
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Reserved
CVLPF
Reserved
RX
R/W
0
0
CHLPF_C (Capture Horizontal LPF coefficient C)
CHLPF_C
K0
00
0
01
0
10
0
11
3/32
CHLPF_Y (Capture Horizontal LPF coefficient Y)
CHLPF_Y
K0
00
0
01
0
10
0
11
3/32
CVLPF_C (Capture Vertical LPF coefficient C)
CVLPF_C
K0
00
0
01
1/4
10
3/16
Reserved
11
CVLPF_Y (Capture Vertical LPF coefficient Y)
CVLPF_Y
K0
00
0
01
1/4
10
3/16
Reserved
11
CaptureBaseAddress + 48h
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Reserved
CHLPF
RX
R/W
0
0
luminance
signal (Y) and a
K1
K2
0
1
1/4
2/4
3/16
10/16
8/32
10/32
K1
K2
0
1
1/4
2/4
3/16
10/16
8/32
10/32
K1
K2
1
0
2/4
1/4
10/16
3/16
K1
K2
1
0
2/4
1/4
10/16
3/16
CMSHP
Reserved
9
8
7
6
5
4
3
Reserved
RX
X
chrominance signal
(Cb
K3
K4
0
0
1/4
0
3/16
0
10/32
3/32
K3
K4
0
0
1/4
0
3/16
0
10/32
3/32
9
8
7
6
5
4
3
CMSVL
18-129
2
1
0
2
1
0

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