Apix® Interface; Outline; Features; Apix® Phy - Fujitsu MB86R02 Jade-D Hardware Manual

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MB86R02 'Jade-D' Hardware Manual V1.64
17 APIX® Interface
This chapter describes the MB86R02 APIX interface.
17.1

Outline

MB86R02 provides two APIX interfaces. Each can be configured as APIX transmitter or receiver and
is compliant to the Inova APIX® Industrial Standard.
17.2

Features

The APIX interface has following features:
17.2.1.1
APIX® PHY
The APIX® PHY provides a high speed serial downstream link and a low speed serial upstream link
compliant to the Inova APIX® Industrial Standard. The downstream link transports video or generic
data and side-band data. The upstream link transports side-band data only.
Details can be found in document "APIX® Automotive Pixel Link Industrial Standard Rev. 1.0"
The downstream link provides the following Bandwidth Modes
Full Bandwidth Mode (1000 Mbit/s)
Half Bandwidth Mode (500 Mbit/s)
Low bandwidth Mode 1 (125 Mbit/s)
Low bandwidth Mode 2 (250 Mbit/s)
One single video channel
Further features of the APIX® PHY module are
Establishment and maintenance of serial frame alignment
Framing/deframing serial frames
Line coding and DC balancing
Serialization/deserialization
17.2.1.2
APIX® Ashell
The APIX® Automotive Shell (Ashell®) provides a secured bidirectional communication path for
control data. The following key functions are offered.
Convenient wrapping of APIX® PHY's interface
Transaction framing and de-framing
Establishment and maintenance of transaction alignment
Exchange of transactions utilizing services of APIX® PHY
Bit Error Detection
Bit error management
Details can be found in document "APIX® Automotive Pixel Link Industrial Standard Rev. 1.0"
17-1

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