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MB86R02 'Jade-D' Hardware Manual V1.64
L0M (L0 layer Mode)
Register
DisplayBaseAddress + 0x20
address
Bit number
31
30 29 28 27 26 25 24 23 22 21 --- 17 16 15 14 13 12 11 10 9
Bit field name
L0C
Reserved
R/W
RW
Initial value
0
Bit 11 to 0
L0H (L0 layer Height)
Specifies the height of the logic frame of the L0 layer in pixel units. Setting value + 1 is
the height
Bit 23 to 16
L0W (L0 layer memory Width)
Sets the memory width (stride) of the logic frame of the L0 layer in 64-byte units
Bit 31
L0C (L0 layer Color mode)
Sets the color mode for L0 layer
0
Indirect color (8 bits/pixel) mode ARGB
1
Direct color (16 bits/pixel) mode ARGB
L0EM (L0-layer Extended Mode)
Register
DisplayBaseAddress + 0x110
address
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit field name
L0EC
R/W
RW
Initial value
Bit 0
L0 WP (L0 layer Window Position enable)
Selects the display position of L0 layer
0
1
Bit 23 to 20
L0PB (L0 layer Palette Base)
Shows the value added to the index when subtracting palette of L0 layer. 16 times of
setting value is added.
Bit 31 and 30
L0EC (L0 layer Extended Color mode)
Sets extended color mode for L0 layer
00
01
10
11
18-74
Reserved
R0
R0
0
0
Reserved
L0PB
R0
RW
0
Compatibility mode display (C layer supported)
Window display
Mode determined by L0C (8/16 ARGB)
Direct color (24 bits/pixel) mode ARGB
16bpp RGBA
24 bpp RGBA
L0W
Reserved
RW
R0
X
0
Reserved
R0
0
----
8
2
1
0
L0H
RW
X
-----
4 3 2
1
0
L0WP
RW
0
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