Pwmx Start Register (Pwmxsr) - Fujitsu MB86R02 Jade-D Hardware Manual

MB86R02 'Jade-D' Hardware Manual V1.64
25.7.7

PWMx start register (PWMxSR)

This register is to set PWM start-up/stop.
Address
Bit 31 30 29
Name
R/W R R R
Initial value 0 0 0
Bit 15 14 13
Name
R/W R R R
Initial value 0 0 0
Bit field
No. Name
31-1 (Reserved)
0 START
25-10
ch0：FFF4_1000 + 14
ch1：FFF4_1100 + 14
ch2：FFF4_6000 + 14
ch3：FFF4_6100 + 14
ch4：FFF4_7000 + 14
ch5：FFF4_7100 + 14
ch6：FFF4_8000 + 14
ch7：FFF4_8100 + 14
28 27 26 25
R R R R
0 0 0 0
12 11 10 9
(Reserved)
R R R R
0 0 0 0
Reserved bits.
Write access is ignored. The read value of these bits is always "0".
Start-up/Stop of PWM are set.
0 Stop (initial value)
Start-up
1 After pulse cycle ends, this bit is cleared to "0" when ONSHOT bit = 1 of
PWMxCR register.
H
H
H
H
H
H
H
H
24 23 22 21
(Reserved)
R R R R
0 0 0 0
8 7 6 5
R R R R
0 0 0 0
Description
20 19 18 17
R R R R
0 0 0 0
4 3 2 1
START
R R R R R/W
0 0 0 0
16
R
0
0
0