Example Of Transfer Procedure - Fujitsu MB86R02 Jade-D Hardware Manual

MB86R02 'Jade-D' Hardware Manual V1.64

28.7.2 Example of transfer procedure

1. Check transmission FIFO is empty with following method:
a. Polling process of THRE bit in the Line status register (LSR)
THRE bit shows transmission FIFO status. When the FIFO is empty, the bit becomes "1".
b. Polling process of TEMT bit in the Line status register (LSR)
TEMT bit shows transmission FIFO and Transmission shift register statuses that data in
transmission process and empty transmission FIFO are able to be confirmed. When they
are empty, TEMT becomes "1".
c. Transmission FIFO empty interrupt process
When all data in transmission FIFO is moved to the Transmission shift register, this interrupt
occurs. It is able to control approval/prohibition in the Interrupt enable register (URTxIER.)
Note:
During transmission FIFO empty interrupt process, check THRE bit of the LSR is
"1" before writing data to transmission FIFO.
• THRE = 1: Transmission FIFO is empty that data is able to be written
• THRE = 0: Transmission FIFO is not empty. Retry from interrupt process to be
2. Set transmission data to transmission FIFO. Up to 16 byte is able to be set in the FIFO at a time.
In this case, THRE bit of the LSR becomes "0".
Note:
The last written data is deleted when writing data to transmission FIFO while it is
full.
Tr ansm i ssi on pr ocedur e
Tr ansm i ssi on FI FO i s em pt y
1.
Set t r ansm i ssi on dat a t o t r ansm i ssi on FI FO
2.
Figure 28-3 Example of transfer procedure
FIFO empty interrupt status without writing data to transmission FIFO.
Yes
End
No
28-17