Programmable I/O Ports; Port Pi Direction Register (Pdi Register, I = 0 To 3, 6 To 10); Port Pi Register (Pi Register, I = 0 To 3, 6 To 10); Pull-Up Control Register 0 To 2 (Pur0 To Pur2 Registers) - Renesas M16C FAMILY series Hardware Manual

M 1 6 C 2 / 8 G o r u p ( M 1 6 C

17. Programmable I/O Ports

Note
Ports P0 to P0
4
package).
The programmable input/output ports (hereafter referred to simply as "I/O ports") consist of 71 lines P0,
P1,P2, P3, P6, P7, P8, P9, P10 (except P9
P3 to P3 , P6, P7, P8, P9
0 3
every line by using a direction register, and can also be chosen to be or not be pulled high in sets of 4 lines.
Figures 17.1 to 17.4 show the I/O ports. Figure 17.5 shows the I/O pins.
Each pin functions as an I/O port, a peripheral function input/output.
For details on how to set peripheral functions, refer to each functional description in this manual. If any pin
is used as a peripheral function input, set the direction bit for that pin to "0" (input mode). Any pin used as an
output pin for peripheral functions is directed for output no matter how the corresponding direction bit is set.

17.1 Port Pi Direction Register (PDi Register, i = 0 to 3, 6 to 10)

Figure 17.6 shows the direction registers.
This register selects whether the I/O port is to be used for input or output. The bits in this register corre-
spond one for one to each port.

17.2 Port Pi Register (Pi Register, i = 0 to 3, 6 to 10)

Figure 17.7 shows the Pi registers.
Data input/output to and from external devices are accomplished by reading and writing to the Pi register.
The Pi register consists of a port latch to hold the output data and a circuit to read the pin status. For ports
set for input mode, the input level of the pin can be read by reading the corresponding Pi register, and data
can be written to the port latch by writing to the Pi register.
For ports set for output mode, the port latch can be read by reading the corresponding Pi register, and data
can be written to the port latch by writing to the Pi register. The data written to the port latch is output from
the pin. The bits in the Pi register correspond one for one to each port.

17.3 Pull-up Control Register 0 to 2 (PUR0 to PUR2 Registers)

Figure 17.8 shows the PUR0 to PUR2 registers.
Registers PUR0 to PUR2 select whether the ports, divided into groups of four ports, are pulled up or not.
The ports, selected by setting the bits in registers PUR2 to PUR0 to "1" (pull-up), are pulled up when the
direction registers are set to "0" (input mode). The ports are pulled up regardless of their function.

17.4 Port Control Register (PCR Register)

Figure 17.9 shows the port control register.
When the P1 register is read after setting the PCR0 bit in the PCR register to "1", the corresponding port
latch can be read no matter how the PD1 register is set.
R e . v 2 0 . 0 J a . n 3 , 1 2 0 0 7
R E J 0 9 B 0 0 4 7 0 - 2 0 0
2 / , 8 M 1 6 C 2 / 8 ) B
, P1 to P1 , P3 to P3
7 0 4 4
4
to P9 , P10 for the 64-pin package. Each port can be set for input or output
0 3
page 282
f o 3 8 5
and P9 to P9 are not available in M16C/28 (64-pin
7 5 7
) for the 80-pin package, or 55 lines P0
17. Programmable I/O Ports
to P0 , P1 to P1 , P2,
0 3 5 7