Hardware Interrupts - Renesas M16C Series Hardware Manual

R8C/11 Group

10.1.3 Hardware Interrupts

Hardware interrupts are classified into two types — special interrupts and peripheral function inter-
rupts.
(1) Special Interrupts
Special interrupts are non-maskable interrupts.
• Watchdog Timer Interrupt
Generated by the watchdog timer. Once a watchdog timer interrupt is generated, be sure to initialize
the watchdog timer. For details about the watchdog timer, refer to Chapter 11, "Watchdog Timer."
• Oscillation Stop Detection Interrupt
Generated by the oscillation stop detection function. For details about the oscillation stop detection
function, refer to Chapter 6, "Clock Generation Circuit."
• Voltage Detection Interrupt
Generated by the voltage detection circuit. For details about the voltage detection circuit, refer to
Section 5.4, "Voltage Detection Circuit."
• Single-step Interrupt
Do not normally use this interrupt because it is provided exclusively for use by development support
tools.
• Address Match Interrupt
An address match interrupt is generated immediately before executing the instruction at the address
indicated by the RMAD0 to RMAD1 register that corresponds to one of the AIER register's AIER0 or
AIER1 bit which is "1" (address match interrupt enabled). For details about the address match inter-
rupt, refer to Section 10.4, "Address Match Interrupt."
(2) Peripheral Function Interrupts
Peripheral function interrupts are maskable interrupts and generated by the microcomputer's internal
functions. The interrupt factors for peripheral function interrupts are listed in Table 10.2.
"Relocatable Vector Tables". For details about the peripheral functions, refer to the description of
each peripheral function in this manual.
Rev.1.20 Jan 27, 2006
REJ09B0062-0120
page 49 of 204
10.1 Interrupt Overview