D9.55 Trcpidr1, Etm Peripheral Identification Register 1 - ARM Cortex-A76 Core Technical Reference Manual

D9.55 TRCPIDR1, ETM Peripheral Identification Register 1
The TRCPIDR1 provides information to identify a trace component.
Bit field descriptions
The TRCPIDR1 is a 32-bit register.
RES0, [31:8]
DES_0, [7:4]
Part_1, [3:0]
Bit fields and details not provided in this description are architecturally defined. See the Arm
Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The TRCPIDR1 can be accessed through the external debug interface, offset
100798_0300_00_en
31
0
RES
Reserved.
RES0
Arm Limited. This is bits[3:0] of JEP106 ID code.
0xB
Most significant four bits of the ETM trace unit part number.
0xD
Copyright © 2016–2018 Arm Limited or its affiliates. All rights

D9.55 TRCPIDR1, ETM Peripheral Identification Register 1

Figure D9-53 TRCPIDR1 bit assignments
reserved.
Non-Confidential
D9 ETM registers
8 7 4 3 0
DES_0 Part_1
®
.
0xFE4
D9-565