ARM Cortex-A76 Core Technical Reference Manual page 542

D9 ETM registers
D9.33 TRCIDR4, ID Register 4
Four address comparator pairs are implemented.
0x4
Bit fields and details not provided in this description are architecturally defined. See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The TRCIDR4 can be accessed through the external debug interface, offset .
0x1F0
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