B2.6 Actlr_El2, Auxiliary Control Register, El2 - ARM Cortex-A76 Core Technical Reference Manual

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B2.6
ACTLR_EL2, Auxiliary Control Register, EL2
The ACTLR_EL2 provides
Bit field descriptions
ACTLR_EL2 is a 64-bit register, and is part of:
The Virtualization registers functional group.
The Other system control registers functional group.
The
IMPLEMENTATION DEFINED
RES0, [63:13]
CLUSTERPMUEN, [12]
SMEN, [11]
RES0, [9:8]
PWREN, [7]
100798_0300_00_en
IMPLEMENTATION DEFINED
functional group.
63
0
RES
Reserved.
RES0
Performance Management Registers enable. The possible values are:
CLUSTERPM* registers are not write-accessible from a lower Exception level. This is
0
the reset value.
CLUSTERPM* registers are write-accessible from EL1 Non-secure if they are write-
1
accessible from EL2.
Scheme Management Registers enable. The possible values are:
Registers CLUSTERACPSID, CLUSTERSTASHSID, CLUSTERPARTCR,
0
CLUSTERBUSQOS, and CLUSTERTHREADSIDOVR are not write-accessible from
EL1 Non-secure. This is the reset value.
Registers CLUSTERACPSID, CLUSTERSTASHSID, CLUSTERPARTCR,
1
CLUSTERBUSQOS, and CLUSTERTHREADSIDOVR are write-accessible from
EL1 Non-secure if they are write-accessible from EL2.
Reserved.
RES0
Power Control Registers enable. The possible values are:
Copyright © 2016–2018 Arm Limited or its affiliates. All rights

B2.6 ACTLR_EL2, Auxiliary Control Register, EL2

configuration and control options for EL2.
13
12
CLUSTERPMUEN
SMEN
ERXPFGEN
Figure B2-2 ACTLR_EL2 bit assignments
reserved.
Non-Confidential
B2 AArch64 system registers
11
10
8
7 6 5
4
3
2
PWREN
AMEN
ECTLREN
ACTLREN
1 0
B2-145

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