ARM Cortex-A76 Core Technical Reference Manual page 291

Chapter B3
Error system registers
This chapter describes the error registers accessed by the AArch64 error registers.
It contains the following sections:
• B3.1 Error system register summary on page
• B3.2 ERR0ADDR, Error Record Address Register on page
• B3.3 ERR0CTLR, Error Record Control Register on page
• B3.4 ERR0FR, Error Record Feature Register on page
• B3.5 ERR0MISC0, Error Record Miscellaneous Register 0 on page
• B3.6 ERR0MISC1, Error Record Miscellaneous Register 1 on page
• B3.7 ERR0PFGCDNR, Error Pseudo Fault Generation Count Down Register on page
• B3.8 ERR0PFGCTLR, Error Pseudo Fault Generation Control Register on page
• B3.9 ERR0PFGFR, Error Pseudo Fault Generation Feature Register on page
• B3.10 ERR0STATUS, Error Record Primary Status Register on page
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