ARM Cortex-A76 Core Technical Reference Manual page 593

A.2 Load/Store accesses crossing page boundaries
The Cortex-A76 core implements a set of behaviors for load or store accesses that cross page boundaries.
Crossing a page boundary with different memory types or shareability attributes
Crossing a 4KB boundary with a Device access
Implementation (for both page boundary specifications)
100798_0300_00_en
The Arm Architecture Reference Manual Armv8, for Armv8-A architecture profile, states that a
®
memory access from a load or store instruction that crosses a page boundary to a memory
location that has a different memory type or shareability attribute results in
behavior.
UNPREDICTABLE
The Arm Architecture Reference Manual Armv8, for Armv8-A architecture profile, states that a
®
memory access from a load or store instruction to Device memory that crosses a 4KB boundary
results in CONSTRAINED UNPREDICTABLE behavior.
For an access that crosses a page boundary, the Cortex-A76 core implements the following
behaviors:
• Store crossing a page boundary:
— No alignment fault.
— The access is split into two stores.
— Each store uses the memory type and shareability attributes associated with its own
address.
• Load crossing a page boundary (Device to Device and Normal to Normal):
— No alignment fault.
— The access is split into two loads.
— Each load uses the memory type and shareability attributes associated with its own
address.
• Load crossing a page boundary (Device to Normal and Normal to Device):
— The instruction will generate an alignment fault.
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-A76 Core AArch32 unpredictable behaviors
®
CONSTRAINED
Appx-A-593