ARM Cortex-A76 Core Technical Reference Manual page 382

Event PMU Event mnemonic
number event bus
(to trace)
0x91
[155:153] RC_ST_SPEC
0xA0
[166] L3_CACHE_RD
100798_0300_00_en
Event description
Release consistency operation speculatively executed, store-release.
L3 cache read.
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C2 Performance Monitor Unit
C2.3 PMU events
(continued)
C2-382