D9.70 Trctraceidr, Trace Id Register - ARM Cortex-A76 Core Technical Reference Manual

D9.70 TRCTRACEIDR, Trace ID Register
The TRCTRACEIDR sets the trace ID for instruction trace.
Bit field descriptions
The TRCTRACEIDR is a 32-bit register.
RES0, [31:7]
TRACEID, [6:0]
Bit fields and details not provided in this description are architecturally defined. See the Arm
Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The TRCTRACEIDR can be accessed through the external debug interface, offset
100798_0300_00_en
31
0
RES
Reserved.
RES0
Trace ID value. When only instruction tracing is enabled, this provides the trace ID.
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Figure D9-67 TRCTRACEIDR bit Assignments
reserved.
Non-Confidential
D9 ETM registers

D9.70 TRCTRACEIDR, Trace ID Register

7 6
TRACEID
®
.
0x040
0
D9-581