Aarch64 Registers By Functional Group - ARM Cortex-A76 Core Technical Reference Manual

B2.4

AArch64 registers by functional group

This section identifies the AArch64 registers by their functional groups and applies to the registers in the
core that are implementation defined or have micro-architectural bit fields. Reset values are provided for
these registers.
Identification registers
Name Type Reset
AIDR_EL1 RO
CCSIDR__EL1 RO
CLIDR_EL1 RO
CSSELR_EL1 RW
CTR_EL0 RO
DCZID_EL0 RO
ERRIDR_EL1 RO
ID_AA64AFR0_EL1 RO
ID_AA64AFR1_EL1 RO
ID_AA64DFR0_EL1 RO
ID_AA64DFR1_EL1 RO
ID_AA64ISAR0_EL1 RO
ID_AA64ISAR1_EL1 RO
ID_AA64MMFR0_EL1 RO
ID_AA64MMFR1_EL1 RO
100798_0300_00_en
0x00000000
-
• 0xC3000123 if L3 cache present.
• 0x82000023 if no L3 cache.
UNK
0x8444C004
0x00000004
0x00000002
0x00000000
0x00000000
0x0000000010305408
0x00000000
0x0000100010211120 if the
•
Cryptographic Extension is
implemented.
• 0x0000100010210000 if the
Cryptographic Extension is not
implemented.
0x0000000000100001
0x0000000000101122
0x0000000010212122
Copyright © 2016–2018 Arm Limited or its affiliates. All rights
Non-Confidential
Description
B2.14 AIDR_EL1, Auxiliary ID Register, EL1
on page B2-155
B2.18 CCSIDR_EL1, Cache Size ID Register, EL1
on page B2-159
B2.19 CLIDR_EL1, Cache Level ID Register, EL1
on page B2-161
B2.32 CSSELR_EL1, Cache Size Selection Register, EL1
on page B2-190
B2.33 CTR_EL0, Cache Type Register, EL0 on page B2-191
B2.34 DCZID_EL0, Data Cache Zero ID Register, EL0
on page B2-193
B2.36 ERRIDR_EL1, Error ID Register, EL1
on page B2-196
B2.52 ID_AA64AFR0_EL1, AArch64 Auxiliary Feature
Register 0 on page B2-214
B2.53 ID_AA64AFR1_EL1, AArch64 Auxiliary Feature
Register 1 on page B2-215
B2.54 ID_AA64DFR0_EL1, AArch64 Debug Feature
Register 0, EL1 on page B2-216
B2.55 ID_AA64DFR1_EL1, AArch64 Debug Feature
Register 1, EL1 on page B2-218
B2.56 ID_AA64ISAR0_EL1, AArch64 Instruction Set
Attribute Register 0, EL1 on page B2-219
B2.57 ID_AA64ISAR1_EL1, AArch64 Instruction Set
Attribute Register 1, EL1 on page B2-221
B2.58 ID_AA64MMFR0_EL1, AArch64 Memory Model
Feature Register 0, EL1 on page B2-222
B2.59 ID_AA64MMFR1_EL1, AArch64 Memory Model
Feature Register 1, EL1 on page B2-224
reserved.
B2 AArch64 system registers
B2.4 AArch64 registers by functional group
B2-136