D9.47 Trclar, Software Lock Access Register - ARM Cortex-A76 Core Technical Reference Manual

D9.47 TRCLAR, Software Lock Access Register
The TRCLAR controls access to registers using the memory-mapped interface, when PADDRDBG31 is
LOW.
When the software lock is set, write accesses using the memory-mapped interface to all ETM trace unit
registers are ignored, except for write accesses to the TRCLAR.
When the software lock is set, read accesses of TRCPDSR do not change the TRCPDSR.STICKYPD bit.
Read accesses of all other registers are not affected.
Bit field descriptions
The TRCLAR is a 32-bit register.
KEY, [31:0]
Bit fields and details not provided in this description are architecturally defined. See the Arm
Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The TRCLAR can be accessed through the external debug interface, offset
100798_0300_00_en
31
Software lock key value:
Clear the software lock.
0xC5ACCE55
All other write values set the software lock.
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D9.47 TRCLAR, Software Lock Access Register

KEY
Figure D9-45 TRCLAR bit assignments
reserved.
Non-Confidential
D9 ETM registers
®
.
0xFB0
D9-557
0