D9.13
TRCCIDR3, ETM Component Identification Register 3
The TRCCIDR3 provides information to identify a trace component.
Bit field descriptions
The TRCCIDR3 is a 32-bit register.
RES0, [31:8]
PRMBL_3, [7:0]
Bit fields and details not provided in this description are architecturally defined. See the Arm
Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The TRCCIDR3 can be accessed through the external debug interface, offset
100798_0300_00_en
31
0
RES
Reserved.
RES0
Preamble byte 3.
0xB1
Copyright © 2016–2018 Arm Limited or its affiliates. All rights
D9.13 TRCCIDR3, ETM Component Identification Register 3
Figure D9-12 TRCCIDR3 bit assignments
reserved.
Non-Confidential
D9 ETM registers
8
7
0
PRMBL_3
®
.
0xFFC
D9-512
Need help?
Do you have a question about the Cortex-A76 Core and is the answer not in the manual?