ARM Cortex-A76 Core Technical Reference Manual page 308

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OF, [27]
MV, [26]
CE, [25:24]
DE, [23]
PN, [22]
UET, [21:20]
[19:5]
SERR, [4:0]
100798_0300_00_en
Overflow. The possible values are:
If UE == 1, then no error status for an Uncorrected error has been discarded.
0
If UE == 0 and DE == 1, then no error status for a Deferred error has been discarded.
If UE == 0, DE == 0, and CE !==
The corrected error counter has not overflowed.
More than one error has occurred and so details of the other error have been discarded.
1
Miscellaneous Registers Valid. The possible values are:
ERR0MISC0 and ERR0MISC1 are not valid.
0
This bit indicates that ERR0MISC0 contains additional information about any error that is
1
recorded by this record.
Corrected error. The possible values are:
No corrected error recorded.
0b00
At least one corrected error recorded.
0b10
Deferred error. The possible values are:
No errors were deferred.
0
At least one error was not corrected and deferred by poisoning.
1
Poison. The value is:
The Cortex-A76 core cannot distinguish a poisoned value from a corrupted value.
0
Uncorrected Error Type. The value is:
Uncontainable.
0b00
RES0.
Reserved.
Primary error code. The possible values are:
No error.
0x0
Errors due to fault injection.
0x1
ECC error from internal data buffer.
0x2
ECC error on cache data RAM.
0x6
ECC error on cache tag or dirty RAM.
0x7
Parity error on TLB data RAM.
0x8
Error response for a cache copyback.
0x12
Deferred error from slave not supported at the consumer. For example, poisoned data
0x15
received from a slave by a master that cannot defer the error further.
Copyright © 2016–2018 Arm Limited or its affiliates. All rights
B3.10 ERR0STATUS, Error Record Primary Status Register
, then:
0b00
reserved.
Non-Confidential
B3 Error system registers
B3-308

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