D9.57 Trcpidr3, Etm Peripheral Identification Register 3 - ARM Cortex-A76 Core Technical Reference Manual

D9.57 TRCPIDR3, ETM Peripheral Identification Register 3
The TRCPIDR3 provides information to identify a trace component.
Bit field descriptions
The TRCPIDR3 is a 32-bit register.
RES0, [31:8]
REVAND, [7:4]
CMOD, [3:0]
Bit fields and details not provided in this description are architecturally defined. See the Arm
Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The TRCPIDR3 can be accessed through the external debug interface, offset
100798_0300_00_en
31
0
RES
Reserved.
RES0
Part minor revision.
0x0
Not customer modified.
0x0
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D9.57 TRCPIDR3, ETM Peripheral Identification Register 3

Figure D9-55 TRCPIDR3 bit assignments
reserved.
Non-Confidential
D9 ETM registers
8 7 4 3 0
REVAND CMOD
®
.
0xFEC
D9-567