Data Memory Controller Interconnect To Other Banks (Tms320C6201 Revision 3) - Texas Instruments TMS320C6201 Reference Manual

Internal Data Memory Organization
Figure 2–5. Data Memory Controller Interconnect to Other Banks
(TMS320C6201 Revision 3)
Block 1
(32K bytes)
Bank 3
Bank 2
Bank 1
Bank 0
2-12
'C6201 CPU
Side B
32 32
16
16
Data memory controller
16
(DMEMC)
16
32
Peripheral External
bus memory
controller interface
Side A
32 32
16
16
16
16
32 32
DMA
controller
Block 0
(32K bytes)
Bank 3
Bank 2
Bank 1
Bank 0