Level 1 Data Cache Mode Settings - Texas Instruments TMS320C6201 Reference Manual

Tms320c6000 series peripherals

Hide thumbs Also See for TMS320C6201:

Table of Contents

L1D Description

Table 4–5. Level 1 Data Cache Mode Settings

Cache enable

Any initial load of an address causes a cache miss to occur. The data is loaded

and stored in the internal cache memory. Any subsequent read from a cached

address will cause a cache hit and that data will be loaded from the internal

cache memory. Figure 4–9 illustrates the organization for a 2-way set associa-

Chapters

Table of Contents