Tms320C6211/C6711 External Memory Interface - Texas Instruments TMS320C6201 Reference Manual

Overview
Figure 9–5. TMS320C6211/C6711 External Memory Interface
9-6
The EMIF signals of the 'C6211/C6711 are shown in Figure 9–5. The
'C6211/C6711 has the following features:
The 'C6211/C6711 EMIF requires that an external clock source (ECLKIN)
be provided by the system. The ECLKOUT signal is produced internally
(based on ECLKIN). All of the memories interfacing with the 'C6211/C6711
should operate off of ECLKOUT. If desired, the CLKOUT2 output can be
routed back to the ECLKIN input.
The synchronized memory interfaces use a four-word burst length which
is optimized for the two-level cache architecture.
The SDRAM interface is flexible, allowing interfaces to a wide range of
SDRAM configurations.
The SDA10 pin has been removed. Address pin EA[12] serves the func-
tion of the SDA10 pin for the SDRAM memories.
Enhanced
data
memory
controller
peripheral bus
ECLKIN
ECLKOUT
ED[31:0]
EA[21:2]
CE[3:0]
BE[3:0]
External
memory
interface
(EMIF)
ARDY
AOE/SDRAS/SSOE
ARE/SDCAS/SSADS
AWE/SDWE/SSWE
HOLD
HOLDA
BUSREQ
Control
registers
Internal
Shared by
all external
interfaces
Muxed
device
control