9.2 Resetting The Emif - Texas Instruments TMS320C6201 Reference Manual

Tms320c6000 series peripherals

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Resetting the EMIF

9.2 Resetting the EMIF

A hardware reset using the RESET pin on the device forces all register values

to their reset state. During reset, all outputs are driven to their inactive levels,

with the exception of the clock outputs (SDCLK, SSCLK, CLKOUT1, and

CLKOUT2). CLKOUT2, SSCLK, and SDCLK are driven high or low during ac-

tive RESET. CLKOUT1 continues clocking unless the values on the PLL con-

figuration pins are changed.On the 'C6211, ECLKIN should be provided during

reset in order to drive EMIF signals to the correct reset values. ECLKOUT will

continue to clock as long as ECLKIN is provided.

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