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Boot Configuration Control via Expansion Bus
Table 8–20. Description of Expansion Bus Boot Configuration via Pull Up/Pull Down
Resistors on XD[31:0]
Field
MTYPE0/1/2/3
BLPOL
RWPOL
HMOD
XARB
FMOD
LEND
BOOTMODE[4:0]
8-50
Description
Memory type
MTYPE=010b: 32-bit wide asynchronous interface
MTYPE=101b: 32-bit wide FIFO interface
MTYPE=other: reserved
Determines polarity of the XBLAST signal when the DSP is a slave on the expansion
bus.
BLPOL=0: XBLAST is active low.
BLPOL=1: XBLAST is active high.
When the DSP initiates a transfer on the expansion bus XBLAST is always active low.
Determines polarity of expansion bus read/write signal.
RWPOL=0: XR/W. Write is active-high.
RWPOL=1, XR/W. Read is active-high.
Host mode (status in XB HPIC)
HMOD = 0: external host interface operates in asynchronous slave mode.
HMOD = 1: external host interface is in synchronous master/slave mode.
Expansion bus arbiter (status in XBGC)
XARB = 0: Internal expansion bus arbiter is disabled
XARB = 1: Internal expansion bus arbiter is enabled.
FIFO mode (status in XBGC)
FMOD = 0: Glue is used for FIFO read interface in all XCE spaces operating in FIFO
mode. XOE can be used in all XCE spaces
FMOD = 1: XOE is reserved for use only in XCE3 for FIFO read mode. XOE is disabled
in all other XCE spaces.
Little endian mode
LEND = 0: system operates in big endian mode
LEND = 1: system operates in little endian mode
Dictates the boot-mode of the device, including host port boot, ROM boot, memory map
selection. For a complete list of boot-modes, see Section 10, TMS320C6000 Boot
Modes.
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