Expansion Bus I/O Port Operation
Figure 8–8. Read and Write FIFO Interface With Glue
Expansion
bus
EXT_INTx
EXT_INTy
Figure 8–9. FIFO Write Cycles
XFCLK
XCEx
XBE[3:0] / XA[5:2]
XWE
WEN = XCEx + XWE
XD[31:0]
8-16
XFCLK
XCEx
XRE
XOE
XWE
XD[31:0]
XA2
RCLK
REN
OE
EF
FF
HF
Q[31:0]
WCLK
WEN
EF
FF
HF
Q[31:0]
XA3
XA4
D2
D3
D4
WCLK
WEN
Synchronous
FIFO
D[31:0]
RCLK
REN
OE
Synchronous
FIFO
Q[31:0]
XA5
D5