L2 Memory Configuration - Texas Instruments TMS320C6201 Reference Manual

Tms320c6000 series peripherals

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L2 Description

Figure 4–13. L2 Memory Configuration

The reset value of the L2MODE field is 000b, thus the L2 RAM is configured

as 64K bytes of mapped memory at reset to support bootloading. Any L2 RAM

that is configured as cache is no longer in the memory map. For example, in

L2 Mode 010b, the address space from 0000 8000h to 0000 FFFFh is no

longer mapped. The associativity of the L2 cache RAM is a function of the L2

Mode. Each 16K byte block of RAM included in the cache adds one way to

the associativity. The line size for the L2 cache is 128 bytes. Figure 4–13

shows the cache associativity for each L2 Mode.

Î Î Î Î Î Î Î Î Î Î

Block base address

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