Non-2D R/W Sync Edma Transfer Without Frame Sync - Texas Instruments TMS320C6201 Reference Manual

Tms320c6000 series peripherals
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Figure 6–9. Non-2D R/W Sync EDMA Transfer Without Frame Sync
6.8.1.2 Frame Synchronized Non-2D Transfer (FS=1)
R/WSYNC
Frame 0
E0
R/WSYNC
Frame 1
E0
R/WSYNC
Frame 2
E0
Figure 6–10 shows the concept of a non-2D EDMA transfer with frame syn-
chronization. Here, the element transfer in each frame is not synchronized, but
instead each frame transfer is synchronized by the channel event. FS bit (in
options field) should be set to '1' to enable frame-synchronized transfer. User-
specified element index (EIX) can be used to stagger elements in a frame.
Frame index (FIX) can be added to the start element address in a frame to de-
rive the next frame start address. The address modification and count modifi-
cation depends on the type of update modes chosen. They are mentioned
here only for an understanding of a non-2D transfer. Specific updates are de-
scribed in sections 6.11 and 6.12.
If linking is enabled (LINK=1, see section 6.9), the complete transfer parame-
ters get reloaded (from the parameter reload space in EDMA parameter RAM)
after sending the last transfer request to the address generation hardware.
EC=1
ECRLD
+EIX
+FIX
E1
E2
EC=1
ECRLD
+EIX
+FIX
E1
E2
EC=1
+EIX
FC=0
E1
E2
Types of EDMA Transfers
En
En
En
EDMA Controller
6-21

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