McBSP Interface Signals and Registers
11.2.2 Receive and Transmit Control Registers: RCR and XCR
Figure 11–4.Receive Control Register (RCR)
31
30
RPHASE
RFRLEN2
RW, +0
RW, +0
15
14
RPHASE 2 †
RFRLEN1
RW, +0
RW, +0
† (R/X) PHASE 2 feature's available only on 'C6211/C6711
‡ RWDREVRS and XWDREVRS 32-bit reversal feature is applicable only to the 'C6211/C6711 device.
Figure 11–5.Transmit Control Register (XCR)
31
30
XPHASE
XFRLEN2
RW, +0
RW, +0
15
14
XPHASE 2 †
XFRLEN1
RW, +0
RW, +0
† (R/X) PHASE 2 feature's available only on 'C6211/C6711
‡ RWDREVRS and XWDREVRS 32-bit reversal feature is applicable only to the 'C6211/C6711 device.
11-14
The receive and transmit control registers (RCR and XCR), shown in
Figure 11–4 and Figure 11–5, configure parameters of the receive and
transmit operations, respectively. The fields of RCR and XCR are
summarized in Figure 11–4.
24
23
21
20
RWDLEN2
RW, +0
8
7
5
RWDLEN1
RW, +0
24
23
XWDLEN2
RW, +0
8
7
XWDLEN1
RW, +0
19
RCOMPAND
RW, +0
4
3
RWDREVRS ‡
RW, +0
21
20
19
XCOMPAND
RW, +0
5
4
XWDREVRS ‡
RW, +0
18
17
RFIG
RDATDLY
RW, +0
RW, +0
Reserved
R, +0
18
17
XFIG
XDATDLY
RW, +0
3
Reserved
R, +0
16
0
16
RW, +0
0