Tms320C6202 Memory Map Summary - Texas Instruments TMS320C6201 Reference Manual

Boot Configuration
Table 10–4. TMS320C6202 Memory Map Summary
Address Range (Hex)
0000 0000 – 003F FFFF
0004 0000 – 003F FFFF
0040 0000 – 00FF FFFF
0100 0000 – 013F FFFF
0140 0000 – 0143 FFFF
0144 0000 – 017F FFFF
0180 0000 – 0183 FFFF
0184 0000 – 0187 FFFF
0188 0000 – 018B FFFF
018C 0000 – 018F FFFF
0190 0000 – 0193 FFFF
0194 0000 – 0197 FFFF
0198 0000 – 019B FFFF
019C 0000 – 019C 01FF
019C 0200 – 019C FFFF
01A0 0000 – 01A3 FFFF
01A4 0000 – 01A7 FFFF
01A8 0000 – 01FF FFFF
0200 0000 – 02FF FFFF
0300 0000 – 03FF FFFF
0400 0000 – 3FFF FFFF
4000 0000 – 4FFF FFFF
5000 0000 – 5FFF FFFF
6000 0000 – 6FFF FFFF
7000 0000 – 7FFF FFFF
8000 0000 – 8001 FFFF
8000 2000 – FFFF FFFF
10-6
The 'C6202 has two memory maps that are supersets of the 'C6201/'C6701
memory maps. All valid 'C6201/'C6701 address ranges are valid on the
'C6202. There are three primary differences: the 'C6202 has larger internal
memory spaces, four external memory locations for the expansion bus
(XCE[3:0]), and a third serial port. The memory maps for the 'C6202 are shown
in Table 10–4.
Size
(Bytes)
256K External memory interface CE0
4M–256K External memory interface CE0
12M External memory interface CE0
4M External memory interface CE1
256K Internal program RAM
4M–256K Reserved
256K
256K
256K
256K
256K
256K
256K
512
256K–512
256K
256K
5.5M
16M
16M
1G – 64M
256M
256M
256M
256M
128K
1G – 128K
Description of Memory Block In
MAP 0
Internal peripheral bus EMIF registers
Internal peripheral bus DMA controller registers
Internal peripheral bus expansion bus registers
Internal peripheral bus McBSP 0 registers
Internal peripheral bus McBSP 1 registers
Internal peripheral bus timer 0 registers
Internal peripheral bus timer 1 registers
Internal peripheral bus interrupt selector registers
Internal peripheral bus power-down registers
Reserved
Internal peripheral bus McBSP2 registers
Reserved
External memory interface CE2
External memory interface CE3
Reserved
Expansion bus XCE0
Expansion bus XCE1
Expansion bus XCE2
Expansion bus XCE3
Internal data RAM
Reserved
MAP 1
Internal program RAM
Reserved
External memory interface CE0
External memory interface CE0
External memory interface CE1
External memory interface CE1