Byte Enables For Hpi Data Write Access - Texas Instruments TMS320C6201 Reference Manual

HPI Signal Descriptions
Table 7–4. Byte Enables for HPI Data Write Access
Data Write
Type
Byte
Byte
Byte
Byte
Halfword
Halfword
Word
7.2.5 Read/Write Select: HR/W
7.2.6 Ready: HRDY
7.2.7 Strobes: HCS, HDS1, HDS2
7-10
First Write
HWOB = 0
HHWIL = 0
Second Write
HWOB = 1
HHWIL = 1
HR/W is the host read/write select input. The host must drive HR/W high to
read and low to write HPI. A host without either a read/write select output or
a read or write strobe can use an address line for this function.
When active (low), HRDY indicates that the HPI is ready for a transfer to be
performed. When inactive, HRDY indicates that the HPI is busy completing the
internal portion of a current read access or a previous HPID read prefetch or
write access. HCS enables HRDY; HRDY is always low when HCS is high.
HCS, HDS1, and HDS2 allow connection to a host that has either:
A single strobe output with read/write select
Separate read and write strobe outputs. In this case, read or write select
can be done by using different addresses.
HBE[1:0]
Second Write
HHWIL = 1
First Write
HHWIL = 0
11 10
11 01
10 11
01 11
11 00
00 11
00 00
Effective Logical Address
LSBs (Binary)
Little Endian Big Endian
00 11
01 10
10 01
11 00
00 10
10 00
00 00