Dma Global Index Register - Texas Instruments TMS320C6201 Reference Manual

5.7.2 Address Adjustment With the Global Index Registers
Figure 5–10. DMA Global Index Register
31
FRAME INDEX
5.7.3 Element Size, Alignment, and Endianness
The particular DMA global index register shown in Figure 5–10 is selected via
the INDEX field in the DMA channel primary control register. Unlike basic
address adjustment, this mode allows different adjustment amounts depend-
ing on whether the element transfer is the last in the current frame. The normal
adjustment value (ELEMENT INDEX) is contained in the 16 LSBs of the
selected DMA global index register. The adjustment value for the end of the
frame (FRAME INDEX) is determined by the 16 MSBs of the selected DMA
global index register. Both of these fields contain signed 16-bit values. Thus,
the index amounts can range from –32 768 to 32 767.
RW, +0
These fields affect address adjustment as follows.
ELEMENT INDEX: For element transfers except the last one in a frame,
ELEMENT INDEX determines the amount to be added to the DMA
channel source or the destination address register as selected by the
SRC DIR or DST DIR field after each read or write transfer, respectively.
FRAME INDEX: If the read or write transfer is the last in a frame, FRAME
INDEX (and not ELEMENT INDEX) is used for address adjustment. This
adjustment occurs in both single frame and multiframe transfers, including
transfers after the last frame in a block.
By using the ESIZE field in the DMA channel primary control register, you can
configure the DMA to transfer 8-bit bytes, 16-bit halfwords, or 32-bit words on
each transfer. The following registers and fields must be loaded with properly
aligned values:
DMA channel source and destination address registers and any associat-
ed reload registers
ELEMENT INDEX
FRAME INDEX
16 15
ELEMENT INDEX
Direct Memory Access (DMA) Controller
Address Generation
RW, +0
0
5-23