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Overview
10.1 Overview
10.2 Device Reset
10-2
The TMS320C6000 platform uses a variety of boot configurations to deter-
mine what actions the devices are to perform after reset for proper device init-
ialization. Each 'C6000 device has some or all of the following boot configura-
tion options:
Selection of the memory map, which determines whether internal or exter-
nal memory is mapped at address 0
Selection of the type of external memory mapped at address 0 if external
memory is mapped there
Selection of the boot process used to initialize the memory at address 0
before the CPU is released from reset.
The external device reset uses an active (low) signal, RESET. While RESET is
low, the device is held in reset and is initialized to the prescribed reset state. All
3-state outputs are placed in the high-impedance state, and all other outputs are
returned to their default states. The rising edge of RESET starts the processor
running with the prescribed boot configuration. The RESET pulse may have to
be increased if the phase-locked loop (PLL) requires synchronization following
power up or when PLL configuration pins change during reset.
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