Texas Instruments TMS320*2801 Series Reference Manual
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Texas Instruments TMS320*2801 Series Reference Manual

Texas Instruments TMS320*2801 Series Reference Manual

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TMS320x280x, 2801x, 2804x Boot ROM
Reference Guide
Literature Number: SPRU722C
November 2004 – Revised October 2006

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Summary of Contents for Texas Instruments TMS320*2801 Series

  • Page 1 TMS320x280x, 2801x, 2804x Boot ROM Reference Guide Literature Number: SPRU722C November 2004 – Revised October 2006...
  • Page 2 SPRU722C – November 2004 – Revised October 2006 Submit Documentation Feedback...

  • Page 3: Table Of Contents

    Contents ..........................Preface ....................Boot ROM Overview ..................Boot ROM Memory Map ................On-Chip Boot ROM IQ Math Tables ....................CPU Vector Table ....................Bootloader Features ................Bootloader Functional Operation ................Bootloader Device Configuration ..................PLL Multiplier Selection ....................Watchdog Module ..................
  • Page 4 List of Figures ................... Memory Map of On-Chip ROM ......................Vector Table Map ....................Bootloader Flow Diagram .................... Boot ROM Function Overview ..................... Jump-to-Flash Flow Diagram ................... Flow Diagram of Jump to M0 SARAM ................Flow Diagram of Jump-to-OTP Memory ..................
  • Page 5 List of Tables ......................Vector Locations ..................Configuration for Device Modes ....................... Boot Mode Selection ..........General Structure Of Source Program Data Stream In 16-Bit Mode ..............LSB/MSB Loading Sequence in 8-Bit Data Stream ...................... Boot Mode Selection ....................SPI 8-Bit Data Stream .....................
  • Page 6 List of Tables SPRU722C – November 2004 – Revised October 2006 Submit Documentation Feedback...

  • Page 7: Preface

    A legend explains the notation used for the properties. – Reserved bits in a register figure designate a bit that is used for future device expansion. Related Documentation From Texas Instruments The following documents describe the related devices and related support tools. Copies of these documents are available on the Internet at www.ti.com.
  • Page 8 TMS320x281x to TMS320x280x Migration Overview describes differences between the Texas Instruments TMS320x281x and TMS320x280x DSPs to assist in application migration from the 281x to the 280x. While the main focus of this document is migration from 281x to 280x, users considering migrating in the reverse direction (280x to 281x) will also find this document useful.
  • Page 9 SPRA873: — Thermo-Electric Cooler Control Using a TMS320F2812 DSP & DRV592 Power Amplifier presents a thermoelectric cooler system consisting of a Texas Instruments TMS320F2812 digital signal processor (DSP) and DRV592 power amplifier. The DSP implements a digital proportional-integral-derivative feedback controller using an integrated 12-bit analog-to-digital converter to read the thermistor, and direct output of pulse-width-modulated waveforms to the H-bridge DRV592 power amplifier.
  • Page 10 Related Documentation From Texas Instruments Read This First SPRU722C – November 2004 – Revised October 2006 Submit Documentation Feedback...

  • Page 11: Boot Rom Overview

    Chapter 1 SPRU722C – November 2004 – Revised October 2006 Boot ROM Overview The boot ROM is a block of read-only memory that is factory programmed....................Topic Page ............. Boot ROM Memory Map ..........On-Chip Boot ROM IQ Math Tables ..............

  • Page 12: Boot Rom Memory Map

    www.ti.com Boot ROM Memory Map Boot ROM Memory Map The boot ROM is a 4K x 16 block of read-only memory located at addresses 0x3F F000 - 0x3F FFF. The on-chip boot ROM is factory programmed with boot-load routines and math tables for use with the C28x™...

  • Page 13: On-Chip Boot Rom Iq Math Tables

    RAM space. The math tables included in the boot ROM are used by the Texas Instruments™C28x™ IQMath Library - A Virtual Floating Point Engine (literature number SPRC087). The 28x IQmath Library is a collection of highly optimized and high precision mathematical functions for C/C++ programmers to seamlessly port a floating-point algorithm into fixed-point code on TMS320C28x devices.

  • Page 14: Cpu Vector Table

    www.ti.com CPU Vector Table CPU Vector Table A CPU vector table resides in boot ROM memory from address 0x3F FFC0 - 0x3F FFFF. This vector table is active after reset when VMAP = 1, ENPIE = 0 (PIE vector table disabled). Figure 1-2.

  • Page 15: Vector Locations

    www.ti.com CPU Vector Table For TI silicon debug and test purposes the vectors located in the boot ROM memory point to locations in the M0 SARAM block as described in Table 1-1. During silicon debug, you can program the specified locations in M0 with branch instructions to catch any vectors fetched from boot ROM.
  • Page 16 www.ti.com CPU Vector Table Boot ROM Overview SPRU722C – November 2004 – Revised October 2006 Submit Documentation Feedback...

  • Page 17: Bootloader Features

    Chapter 2 SPRU722C – November 2004 – Revised October 2006 Bootloader Features This section describes in detail the boot mode selection process, as well as the specifics of the bootloader operation....................Topic Page ..........Bootloader Functional Operation ..........Bootloader Device Configuration .............

  • Page 18: Bootloader Functional Operation

    www.ti.com Bootloader Functional Operation Bootloader Functional Operation The bootloader is the program located in the on-chip boot ROM that is executed following a reset. The bootloader is used to transfer code from an external source into internal memory following power up. This allows code to reside in slow non-volatile memory externally, and be transferred to high-speed memory to be executed.

  • Page 19: Bootloader Device Configuration

    www.ti.com Bootloader Device Configuration Bootloader Device Configuration At reset, any 28x™ CPU-based device is in 27x™ object-compatible mode. It is up to the application to place the device in the proper operating mode before execution proceeds. On the 28x devices, when booting from the internal boot ROM, the device is configured for 28x operating mode by the boot ROM software.

  • Page 20: Taking An Itrap Interrupt

    www.ti.com Taking an ITRAP Interrupt Taking an ITRAP Interrupt If an illegal opcode is fetched, the 28x will take an ITRAP (illegal trap) interrupt. During the boot process, the interrupt vector used by the ITRAP is within the CPU vector table of the boot ROM. As of version 4 of the boot ROM code, the ITRAP vector points to an interrupt service routine (ISR) within the boot ROM named ITRAPIsr().

  • Page 21: Bootloader Modes

    www.ti.com Bootloader Modes Bootloader Modes To accommodate different system requirements, the boot ROM offers a variety of different boot modes. This section describes the different boot modes and gives brief summary of their functional operation. The states of three GPIO pins are used to determine the desired boot mode as shown in Table 2-2.

  • Page 22: Boot Rom Function Overview

    www.ti.com Bootloader Modes Figure 2-2 shows an overview of the boot process. Each step is described in greater detail in following sections. Figure 2-2. Boot ROM Function Overview Reset InitBoot Call SelectBootMode Call Read the state Read boot loader, of I/O pins to Call EntryPoint determine what...

  • Page 23: Flow Diagram Of Jump To M0 Saram

    www.ti.com Bootloader Modes Figure 2-4. Flow Diagram of Jump to M0 SARAM SelectBootMode Jump to Execution Reset InitBoot Select jump ExitBoot continues 0x00 0000 to M0 SARAM • Jump to OTP memory In this mode, the boot ROM software will configure the device for 28x operation and then branch directly to at 0x3D 7800;...

  • Page 24: Bootloader Data Stream Structure

    www.ti.com Bootloader Data Stream Structure 2.10 Bootloader Data Stream Structure The following two tables and associated examples show the structure of the data stream incoming to the bootloader. The basic structure is the same for all the bootloaders and is based on the C54x source data stream generated by the C54x hex utility.

  • Page 25: General Structure Of Source Program Data Stream In 16-Bit Mode

    www.ti.com Bootloader Data Stream Structure Table 2-3. General Structure Of Source Program Data Stream In 16-Bit Mode Word Contents 10AA (KeyValue for memory width = 16bits) Register initialization value or reserved for future use Register initialization value or reserved for future use Register initialization value or reserved for future use Register initialization value or reserved for future use Register initialization value or reserved for future use...
  • Page 26 www.ti.com Bootloader Data Stream Structure Example 2-1. Data Stream Structure 16-bit 10AA ; 0x10AA 16-bit key value 0000 ; 8 reserved words 0000 0000 0000 0000 0000 0000 0000 003F ; 0x003F8000 EntryAddr, starting point after boot load completes 8000 0005 ;...

  • Page 27: Lsb/Msb Loading Sequence In 8-Bit Data Stream

    www.ti.com Bootloader Data Stream Structure In 8-bit mode, the least significant byte (LSB) of the word is sent first followed by the most significant byte (MSB). For 32-bit values, such as a destination address, the most significant word (MSW) is loaded first, followed by the least significant word (LSW).

  • Page 28: Basic Transfer Procedure

    www.ti.com Basic Transfer Procedure Example 2-2. Data Stream Structure 8-bit AA 08 ; 0x08AA 8-bit key value 00 00 00 00 ; 8 reserved words 00 00 00 00 00 00 00 00 00 00 00 00 3F 00 00 80 ; 0x003F8000 EntryAddr, starting point after boot load completes 05 00 ;...

  • Page 29: Initboot Assembly Routine

    www.ti.com InitBoot Assembly Routine Figure 2-6. Bootloader Basic Transfer Procedure Read first word (W1) Read second word (W2) and discard 0x10AA upper 8-bits Data format error W2:W1= Return 0x08AA 16-bit data size FLASH_ENTRY_POINT 8-bit Read EntryPoint address DataSize Read BlockSize (R) Return EntryPoint Read BlockAddress...

  • Page 30: Selectbootmode Function

    www.ti.com SelectBootMode Function Figure 2-7. Overview of InitBoot Assembly Function Init Boot Initialize device OBJMODE=1 AMODE = 0 Dummy read of Call Call MOM1MAP=1 CSM password SelectBootMode ExitBoot DP = 0 locations OVM = 0 SPM= 0 SP = 0x400 2.13 SelectBootMode Function To determine the desired boot mode, the SelectBootMode function examines the state of 3 GPIO pins as...
  • Page 31 www.ti.com SelectBootMode Function • SCI-A boot The SCI bootloader will be called. Depending on the requested baud rate, however, the device may not be able to autobaud lock. In this case the boot ROM software will loop in the autobaud lock function indefinitely.

  • Page 32: Overview Of The Selectbootmode Function

    www.ti.com SelectBootMode Function Figure 2-8. Overview of the SelectBootMode Function SelectBootMode Configure GPIO18, GPIO29, GPIO34 as input pins Read boot mode pins Dummy read of CSM password You must have previously programmed Return a branch statement at flash address FLASH 0x3F 7FF6 to redirect program as FLASH_ENTRY_POINT boot...

  • Page 33: Copydata Function

    www.ti.com CopyData Function 2.14 CopyData Function Each of the bootloaders uses the same function to copy data from the port to the DSP SARAM. This function is the CopyData() function. This function uses a pointer to a GetWordData function that is initialized by each of the loaders to properly read data from that port.

  • Page 34: Overview Of Sci_Boot Function

    www.ti.com SCI_Boot Function At higher baud rates, the slew rate of the incoming data bits can be effected by transceiver and connector performance. While normal serial communications may work well, this slew rate may limit reliable auto-baud detection at higher baud rates (typically beyond 100kbaud) and cause the auto-baud lock feature to fail.

  • Page 35: Parallel_Boot Function (Gpio)

    www.ti.com Parallel_Boot Function (GPIO) Figure 2-12. Overview of SCI_GetWordData Function Data SCIA_GetWordData Received Read LSB Data Echoback LSB Received to host Read MSB Echoback MSB Return MSB:LSB to host 2.16 Parallel_Boot Function (GPIO) The parallel general purpose I/O (GPIO) boot mode asynchronously transfers code from GPIO0-GPIO15 to internal memory.

  • Page 36: Parallel Gpio Bootloader Handshake Protocol

    www.ti.com Parallel_Boot Function (GPIO) Figure 2-14. Parallel GPIO bootloader Handshake Protocol Host control GPIO27 DSP control GPIO26 1. The DSP indicates it is ready to start receiving data by pulling the GPIO26 pin low. 2. The bootloader waits until the host puts data on GPIO[15:0]. The host signals to the DSP that data is ready by pulling the GPIO27 pin low.

  • Page 37: Parallel Gpio Mode - Host Transfer Flow

    www.ti.com Parallel_Boot Function (GPIO) Figure 2-16. Parallel GPIO Mode - Host Transfer Flow Start transfer DSP ready (GPIO26=0) DSP ack (GPIO26=1) Load GPIO[15:0] with data Signal that data Acknowledge DSP is ready (GPIO27=1) (GPIO27=0) More data End transfer Figure 2-17 Figure 2-18 show the flow used to read a single word of data from the parallel port.

  • Page 38: Bit Parallel Getword Function

    www.ti.com Parallel_Boot Function (GPIO) Figure 2-17. 16-Bit Parallel GetWord Function Parallel_GetWordData16bit Signal host that DSP is ready (GPIO26 = 0) Data ready (GPIO27 = 0) Read word of data from GPIO[15:0] DSP ack read complete (GPIO26 = 1) Host (GPIO27 = 1) Return WordData Bootloader Features SPRU722C –...

  • Page 39: Bit Parallel Getword Function

    www.ti.com Parallel_Boot Function (GPIO) Figure 2-18. 8-Bit Parallel GetWord Function Parallel_GetWordData 8 bit Signal host that DSP is ready Signal host that DSP is ready to read MSB (GPIO26 = 0) (GPIO26 = 0) Data Data ready ready (GPIO27 = 0) (GPIO27 = 0) Read word of data Read word from...

  • Page 40: Spi_Boot Function

    www.ti.com SPI_Boot Function 2.17 SPI_Boot Function The SPI loader expects an 8-bit wide SPI-compatible serial EEPROM device to be present on the SPI-A pins as indicated in Figure 2-19. The SPI bootloader does not support a 16-bit data stream. Figure 2-19. SPI Loader Serial SPI EEPROM SPISIMOA...

  • Page 41: Data Transfer From Eeprom Flow

    www.ti.com SPI_Boot Function The data transfer is done in "burst" mode from the serial SPI EEPROM. The transfer is carried out entirely in byte mode (SPI at 8 bits/character). A step-by-step description of the sequence follows: Step 1. The SPI-A port is initialized Step 2.

  • Page 42: I 2 C Boot Function

    www.ti.com C Boot Function Figure 2-21. Overview of SPIA_GetWordData Function Data Send dummy SPIA_GetWordData Received character Read LSB Data Send dummy Received character Read MSB Return MSB:LSB 2.18 I C Boot Function The I C bootloader expects an 8-bit wide I C-compatible EEPROM device to be present at address 0x50 on the I C-A bus as indicated in...

  • Page 43: Overview Of I2C_Boot Function

    www.ti.com C Boot Function Figure 2-23. Overview of I2C_Boot Function C_Boot Set CopyWord function pointer to NACK Return I2C_CopyWord received FLASH_ENTRY_POINT Enable SDAA and SCLA pins Enable pullups on Read KeyValue SDAA and SCLA Enable I2C−A clock Valid Return KeyValue FLASH_ENTRY_POINT Set slave address 0x50 (0x08AA)

  • Page 44: Random Read

    www.ti.com C Boot Function Arbitration, bus busy, and slave signals are not checked. Therefore, no other master is allowed to control the bus during this initialization phase. If the application requires another master during I C boot mode, that master must be configured to hold off sending any I C messages until the application software signals that it is past the bootloader portion of initialization.

  • Page 45: Ecan Boot Function

    www.ti.com eCAN Boot Function Figure 2-25. Sequential Read SDA LINE 0 0 0 1 0 Device DATA BYTE n DATA BYTE n+1 Address 2.19 eCAN Boot Function The eCAN bootloader asynchronously transfers code from eCAN-A to internal memory. The host can be any CAN node.

  • Page 46: Ecan 8-Bit Data Stream

    www.ti.com eCAN Boot Function Table 2-9. eCAN 8-Bit Data Stream Keyvalue: 0x08AA Part of 8 reserved words stream Part of 8 reserved words stream Part of 8 reserved words stream Part of 8 reserved words stream Part of 8 reserved words stream Part of 8 reserved words stream Part of 8 reserved words stream Part of 8 reserved words stream...

  • Page 47: Exitboot Assembly Routine

    www.ti.com ExitBoot Assembly Routine 2.20 ExitBoot Assembly Routine The Boot ROM includes an ExitBoot routine that restores the CPU registers to their default state at reset. This is performed on all registers with one exception. The OBJMODE bit in ST1 is left set so that the device remains configured for C28x operation.

  • Page 48: Cpu Register Restored Values

    www.ti.com ExitBoot Assembly Routine Table 2-10. CPU Register Restored Values Register Value Register Value 0x0000 0000 0x0000 0000 0x0000 0000 0x00 0000 XAR0-XAR7 0x0000 0000 0x0000 0x0000 15:10 OVC = 0 0x0A0B 15:13 ARP = 0 9:7 PM = 0 12 XF = 0 6 V = 0 11 M0M1MAP = 1...

  • Page 49: Building The Boot Table

    Chapter 3 SPRU722C – November 2004 – Revised October 2006 Building the Boot Table This chapter explains how to generate the data stream and boot table required for the bootloader....................Topic Page ..............The C2000 Hex Utility ....Example: Preparing a COFF File For eCAN Bootloading SPRU722C –...

  • Page 50: The C2000 Hex Utility

    www.ti.com The C2000 Hex Utility The C2000 Hex Utility To use the features of the bootloader, you must generate a data stream and boot table as described in Section 2.10. The hex conversion utility tool, included with the 28x code generation tools, can generate the required data stream including the required boot table.

  • Page 51: Example: Preparing A Coff File For Ecan Bootloading

    www.ti.com Example: Preparing a COFF File For eCAN Bootloading Table 3-1. Boot-Loader Options Option Description -boot Convert all sections into bootable form (use instead of a SECTIONS directive) -sci8 Specify the source of the bootloader table as the SCI-A port, 8-bit mode -spi8 Specify the source of the bootloader table as the SPI-A port, 8-bit mode -gpio8...
  • Page 52 www.ti.com Example: Preparing a COFF File For eCAN Bootloading Example 3-1. GPIO34TOG Map File output attributes/ section page origin length input sections -------- ---- ---------- ---------- ---------------- codestart 00000000 00000002 00000000 00000002 DSP280x_CodeStartBranch.obj (codestart) .pinit 00000002 00000000 .switch 00000002 00000000 UNINITIALIZED ramfuncs 00000002...
  • Page 53 www.ti.com Example: Preparing a COFF File For eCAN Bootloading Example 3-3. GPIO34TOG Data Stream AA 08 ;Keyvalue 00 00 00 00 00 00 00 00 ;8 reserved words 00 00 00 00 00 00 00 00 3F 00 00 A0 ;Entrypoint 0x003FA000 02 00 ;Load 2 words - codestart section...
  • Page 54 www.ti.com Example: Preparing a COFF File For eCAN Bootloading Building the Boot Table SPRU722C – November 2004 – Revised October 2006 Submit Documentation Feedback...

  • Page 55: Bootloader Code Overview

    Chapter 4 SPRU722C – November 2004 – Revised October 2006 Bootloader Code Overview This chapter contains information on the Boot ROM version, checksum, and code....................Topic Page ......Boot ROM Version and Checksum Information ..........Bootloader Code Revision History ...........

  • Page 56: Boot Rom Version And Checksum Information

    www.ti.com Boot ROM Version and Checksum Information Boot ROM Version and Checksum Information The boot ROM contains its own version number located at address 0x3F FFBA. This version number starts at 1 and will be incremented any time the boot ROM code is modified. The next address, 0x3F FFBB contains the month and year (MM/YY in decimal) that the boot code was released.

  • Page 57: Bootloader Code Listing (V3.0)

    www.ti.com Bootloader Code Listing (V3.0) to 0xFFFE. – The version number, release date and checksum memory locations have been updated to reflect the new release. • Version: 2, Released: January 2005 The following changes were made in V2: – The version number, release date and checksum memory locations have been updated to reflect the new release.
  • Page 58 www.ti.com Bootloader Code Listing (V3.0) #define FLASH_ENTRY_POINT 0x3F7FF6 #define OTP_ENTRY_POINT 0x3D7800 #define RAM_ENTRY_POINT 0x000000 #define PASSWORD_LOCATION 0x3F7FF8 #define ERROR #define NO_ERROR #define EIGHT_BIT #define SIXTEEN_BIT #define EIGHT_BIT_HEADER 0x08AA #define SIXTEEN_BIT_HEADER 0x10AA typedef Uint16 (* uint16fptr)(); extern uint16fptr GetWordData; #endif // end of F280x_BOOT_H definition Bootloader Code Overview SPRU722C –...
  • Page 59 www.ti.com Bootloader Code Listing (V3.0) ;; TI File $Revision: /main/6 $ ;; Checkin $Date: April 21, 2005 16:00:01 $ ;;########################################################################### ;; FILE: Init_Boot.asm ;; TITLE: 280x Boot Rom Initialization and Exit routines. ;; Functions: _InitBoot _ExitBoot ;; Notes: ;;########################################################################### ;; $TI Release:$ ;;...
  • Page 60 www.ti.com Bootloader Code Listing (V3.0) CLRC OVM ; Set PM shift of 0 SPM 0 ; Decide which boot mode to use _SelectBootMode ; Cleanup and exit. At this point the EntryAddr ; is located in the ACC register _ExitBoot,UNC ;----------------------------------------------- ;...
  • Page 61 www.ti.com Bootloader Code Listing (V3.0) (OBJMODE = 1, AMODE = 0) ;----------------------------------------------- ZAPA MOVL XT,ACC MOVZ AR0,AL MOVZ AR1,AL MOVZ AR2,AL MOVZ AR3,AL MOVZ AR4,AL MOVZ AR5,AL MOVZ AR6,AL MOVZ AR7,AL MOVW DP, #0 ;------------------------------------------------ Restore ST0 and ST1. Note OBJMODE is the only bit not restored to its reset state.
  • Page 62 www.ti.com Bootloader Code Listing (V3.0) // TI File $Revision: /main/2 $ // Checkin $Date: January 10, 2005 14:39:40 $ //########################################################################### // FILE: SelectMode_Boot.c // TITLE: 280x Boot Mode selection routines // Functions: Uint32 SelectBootMode(void) inline void SelectMode_GPOISelect(void) // Notes: //########################################################################### // $TI Release:$ // $Release Date:$ //###########################################################################...
  • Page 63 www.ti.com Bootloader Code Listing (V3.0) EDIS; // Form BootMode from BOOT select pins BootMode = GpioDataRegs.GPADAT.bit.GPIO18 << 2; BootMode |= GpioDataRegs.GPADAT.bit.GPIO29 << 1; BootMode |= GpioDataRegs.GPBDAT.bit.GPIO34; // Read the password locations - this will unlock the // CSM only if the passwords are erased. Otherwise it // will not have an effect.
  • Page 64 www.ti.com Bootloader Code Listing (V3.0) // TI File $Revision: /main/2 $ // Checkin $Date: January 10, 2005 14:39:44 $ //########################################################################### // FILE: SysCtrl_Boot.c // TITLE: F2810/12 Boot Rom System Control Routines // Functions: void WatchDogDisable(void) void WatchDogEnable(void) // Notes: //########################################################################### // $TI Release:$ // $Release Date:$ //###########################################################################...
  • Page 65 www.ti.com Bootloader Code Listing (V3.0) // TI File $Revision: /main/2 $ // Checkin $Date: January 10, 2005 14:39:41 $ //########################################################################### // FILE: Shared_Boot.c // TITLE: 280x Boot loader shared functions // Functions: void CopyData(void) Uint32 GetLongData(void) void ReadReservedFn(void) //########################################################################### // $TI Release:$ // $Release Date:$ //########################################################################### #include "DSP280x_Device.h"...
  • Page 66 www.ti.com Bootloader Code Listing (V3.0) BlockHeader.DestAddr = GetLongData(); for(I = 1; I <= BlockHeader.BlockSize; I++) wordData = (*GetWordData)(); *(Uint16 *)BlockHeader.DestAddr++ = wordData; // Get the size of the next block BlockHeader.BlockSize = (*GetWordData)(); return; //################################################# // Uint32 GetLongData(void) //----------------------------------------------------- // This routine fetches a 32-bit value from the peripheral // input stream.
  • Page 67 www.ti.com Bootloader Code Listing (V3.0) // TI File $Revision: /main/3 $ // Checkin $Date: January 10, 2005 15:57:54 $ //########################################################################### // FILE: SPI_Boot.c // TITLE: 280x SPI Boot mode routines // Functions: Uint32 SPI_Boot(void) inline void SPIA_Init(void) inline void SPIA_Transmit(u16 cmdData) inline void SPIA_ReservedFn(void);...
  • Page 68 www.ti.com Bootloader Code Listing (V3.0) EntryAddr = GetLongData(); // 7. Receive and copy one or more code sections to destination addresses CopyData(); // 8. Disable EEPROM chip enable - high Chip enable - high GpioDataRegs.GPASET.bit.GPIO19 = 1; return EntryAddr; //################################################# // void SPIA_Init(void) //---------------------------------------------- // Initialize the SPI-A port for communications...
  • Page 69 www.ti.com Bootloader Code Listing (V3.0) Uint16 recvData; // Send Read command/dummy word to EEPROM to fetch a byte SpiaRegs.SPITXBUF = cmdData; while( (SpiaRegs.SPISTS.bit.INT_FLAG) !=1); // Clear SPIINT flag and capture received byte recvData = SpiaRegs.SPIRXBUF; return recvData; //################################################# // void SPIA_ReservedFn(void) //------------------------------------------------- // This function reads 8 reserved words in the header.
  • Page 70 www.ti.com Bootloader Code Listing (V3.0) return wordData; Bootloader Code Overview SPRU722C – November 2004 – Revised October 2006 Submit Documentation Feedback...
  • Page 71 www.ti.com Bootloader Code Listing (V3.0) // TI File $Revision: /main/3 $ // Checkin $Date: January 10, 2005 15:06:37 $ //########################################################################### // FILE: SCI_Boot.c // TITLE: 280x SCI Boot mode routines // Functions: Uint32 SCI_Boot(void) inline void SCIA_Init(void) inline void SCIA_AutobaudLock(void) Uint32 SCIA_GetWordData(void) // Notes: //###########################################################################...
  • Page 72 www.ti.com Bootloader Code Listing (V3.0) CopyData(); return EntryAddr; //################################################# // void SCIA_Init(void) //---------------------------------------------- // Initialize the SCI-A port for communications // with the host. //---------------------------------------------- inline void SCIA_Init() // Enable the SCI-A clocks EALLOW; SysCtrlRegs.PCLKCR0.bit.SCIAENCLK=1; SysCtrlRegs.LOSPCP.all = 0x0002; SciaRegs.SCIFFTX.all=0x8000; // 1 stop bit, No parity, 8-bit character // No loopback SciaRegs.SCICCR.all = 0x0007;...
  • Page 73 www.ti.com Bootloader Code Listing (V3.0) // 'A' or 'a' and lock while(SciaRegs.SCIFFCT.bit.ABD != 1) {} // After autobaud lock, clear the CDC bit SciaRegs.SCIFFCT.bit.CDC = 0; while(SciaRegs.SCIRXST.bit.RXRDY != 1) { } byteData = SciaRegs.SCIRXBUF.bit.RXDT; SciaRegs.SCITXBUF = byteData; return; //################################################# // Uint16 SCIA_GetWordData(void) //----------------------------------------------- // This routine fetches two bytes from the SCI-A // port and puts them together to form a single...
  • Page 74 www.ti.com Bootloader Code Listing (V3.0) // TI File $Revision: /main/2 $ // Checkin $Date: January 10, 2005 14:39:37 $ //########################################################################### // FILE: Parallel_Boot.c // TITLE: 280x Parallel Port I/O boot routines // Functions: Uint32 Parallel_Boot(void) inline void Parallel_GPIOSelect(void) inline Uint16 Parallel_CheckKeyVal(void) Uint16 Parallel_GetWordData_8bit() Uint16 Parallel_GetWordData_16bit() void Parallel_WaitHostRdy(void)
  • Page 75 www.ti.com Bootloader Code Listing (V3.0) Uint32 Parallel_Boot() Uint32 EntryAddr; // Setup for Parallel boot Parallel_GPIOSelect(); // Check for the key value. Based on this the data will // be read as 8-bit or 16-bit values. if (Parallel_CheckKeyVal() == ERROR) return FLASH_ENTRY_POINT; // Read and discard the reserved words ReadReservedFn();...
  • Page 76 www.ti.com Bootloader Code Listing (V3.0) GpioCtrlRegs.GPADIR.bit.DSP_CTRL = 1; GpioCtrlRegs.GPADIR.bit.HOST_CTRL = 0; EDIS; //################################################# // void Parallel_CheckKeyVal(void) //----------------------------------------- // Determine if the data you are loading is in // 8-bit or 16-bit format. // If neither, return an error. // Note that if the host never responds then // the code will be stuck here.
  • Page 77 www.ti.com Bootloader Code Listing (V3.0) // GP I/O port are ignored. In the 8-bit case the // first fetches the LSB and then the MSB from the // GPIO port. These two bytes are then put together to // form a single 16-bit word that is then passed back // to the host.
  • Page 78 www.ti.com Bootloader Code Listing (V3.0) // TI File $Revision: /main/4 $ // Checkin $Date: January 10, 2005 15:57:47 $ //########################################################################### // FILE: I2C_Boot.c // TITLE: 280x I2C Boot mode routines // Functions: Uint32 I2C_Boot(void) inline void I2C_Init(void) inline Uint16 I2C_CheckKeyVal(void) inline void I2C_ReservedFn(void) Uint16 I2C_GetWord(void) // Notes:...
  • Page 79 www.ti.com Bootloader Code Listing (V3.0) inline void I2C_Init(void); inline Uint16 I2C_CheckKeyVal(void); inline void I2C_ReservedFn(void); Uint16 I2C_GetWord(void); // External functions extern void CopyData(void); extern Uint32 GetLongData(void); //################################################# // Uint32 I2C_Boot(void) //-------------------------------------------- // This module is the main I2C boot routine. // It will load code via the I2C-A port. // It will return an entry point address back // to the ExitBoot routine.
  • Page 80 www.ti.com Bootloader Code Listing (V3.0) // Initialize I2C in master transmitter mode I2caRegs.I2CSAR = 0x0050; // Slave address - EEPROM control code I2caRegs.I2CPSC.all = 0x0; // I2C clock should be between 7Mhz-12Mhz I2caRegs.I2CCLKL = 0x0035; // Prescalers set for 100kHz bit rate I2caRegs.I2CCLKH = 0x0035;...
  • Page 81 www.ti.com Bootloader Code Listing (V3.0) // The remaining reserved words are read and discarded // and then program execution returns to the main routine. //------------------------------------------------- inline void I2C_ReservedFn(void) Uint16 I2CPrescaler; Uint16 I2cClkHData; Uint16 I2cClkLData; Uint16 I; // Get I2CPSC, I2CCLKH, and I2CCLKL values I2CPrescaler = I2C_GetWord();...
  • Page 82 www.ti.com Bootloader Code Listing (V3.0) // TI File $Revision: /main/7 $ // Checkin $Date: January 20, 2005 10:05:26 $ //########################################################################### // FILE: CAN_Boot.c // TITLE: 280x CAN Boot mode routines // Functions: Uint32 CAN_Boot(void) void CAN_Init(void) Uint32 CAN_GetWordData(void) // Notes: // BRP = 2, Bit time = 10.
  • Page 83 www.ti.com Bootloader Code Listing (V3.0) // If the KeyValue was invalid, abort the load // and return the flash entry point. if (CAN_GetWordData() != 0x08AA) return FLASH_ENTRY_POINT; ReadReservedFn(); EntryAddr = GetLongData(); CopyData(); return EntryAddr; //################################################# // void CAN_Init(void) //---------------------------------------------- // Initialize the CAN-A port for communications // with the host.
  • Page 84 www.ti.com Bootloader Code Listing (V3.0) ECanaRegs.CANGIF1.all = 0xFFFFFFFF; /* Configure bit timing parameters for eCANA*/ ECanaShadow.CANMC.all = ECanaRegs.CANMC.all; ECanaShadow.CANMC.bit.CCR = 1 ; // Set CCR = 1 ECanaRegs.CANMC.all = ECanaShadow.CANMC.all; while(ECanaRegs.CANES.bit.CCE != 1 ) {} // Wait for CCE bit to be set.. ECanaShadow.CANBTC.all = 0;...
  • Page 85 www.ti.com Bootloader Code Listing (V3.0) // Fetch the MSB byteData = (Uint16)ECanaMboxes.MBOX1.MDL.byte.BYTE1; // MS byte // form the wordData from the MSB:LSB wordData |= (byteData << 8); /* Clear all RMPn bits */ ECanaRegs.CANRMP.all = 0xFFFFFFFF; return wordData; Data frames with a Standard MSGID of 0x1 should be transmitted to the ECAN-A bootloader. This data will be received in Mailbox1, whose MSGID is 0x1.
  • Page 86 www.ti.com Bootloader Code Listing (V3.0) 2. Made BRP = 1. BRP was 0 in rev 1.0 . BT is now 10 to maintain the SYSCLKOUT-bitrate relationship. 3. Changed the statement ECanaMboxes.MBOX1.MSGID.bit.STDMSGID = 1; ECanaMboxes.MBOX1.MSGID.all = 0x00040000; since IDE,AME bits are not initialized in the previous version. 4.

  • Page 87: Bootloader Code Listing (V4.0)

    www.ti.com Bootloader Code Listing (V4.0) // TI File $Revision: /main/5 $ // Checkin $Date: April 21, 2005 15:59:42 $ //########################################################################### // FILE: F280x_boot_rom_lnk.cmd // TITLE: F280x boot rom linker command file //########################################################################### // $TI Release:$ // $Release Date:$ //########################################################################### MEMORY PAGE 0 : TABLES : origin = 0x3FF000, length = 0x000b50...
  • Page 88 www.ti.com Bootloader Code Listing (V4.0) ;;########################################################################### ;; $TI Release:$ ;; $Release Date:$ ;;########################################################################### .def _InitBoot .ref _SelectBootMode .sect ".Flash" ; Flash API checks this for .word 0xFFFE ; silicon compatability .sect ".Version" .word 0x0004 ; 280x Boot ROM Version 4 .word 0x0406 ;...
  • Page 89 www.ti.com Bootloader Code Listing (V4.0) ;----------------------------------------------- ; _ExitBoot ;----------------------------------------------- ;----------------------------------------------- ;This module cleans up after the boot loader ; 1) Make sure the stack is deallocated. SP = 0x400 after exiting the boot loader ; 2) Push 0 onto the stack so RPC will be 0 after using LRETR to jump to the entry point ;...
  • Page 90 www.ti.com Bootloader Code Listing (V4.0) Restore ST0 and ST1. Note OBJMODE is the only bit not restored to its reset state. OBJMODE is left set for C28x object operating mode. ST0 = 0x0000 ST1 = 0x0A0B 15:10 OVC = 0 15:13 ARP = 0 9: 7...
  • Page 91 www.ti.com Bootloader Code Listing (V4.0) ; This module performs the following actions: 1) enables the watchdog 2) loops forever ;----------------------------------------------- .sect ".Isr" _ITRAPIsr: SETC OBJMODE ;Set OBJMODE for 28x object code EALLOW ;Enable EALLOW protected register access MOVZ DP, #7029h>>6 ;Set data page for WDCR register MOV @7029h, #0028h ;Clear WDDIS bit in WDCR to enable Watchdog...
  • Page 92 www.ti.com Bootloader Code Listing (V4.0) .long 0x00005e .long 0x000060 .long 0x000062 .long 0x000064 .long _ITRAPIsr ;ITRAP .long 0x000068 .long 0x00006a .long 0x00006c .long 0x00006e .long 0x000070 .long 0x000072 .long 0x000074 .long 0x000076 .long 0x000078 .long 0x00007a .long 0x00007c .long 0x00007e Bootloader Code Overview SPRU722C –...

  • Page 93: Revision History

    Appendix A SPRU722C – November 2004 – Revised October 2006 Revision History This document was revised to SPRU722C from SPRU722B. This appendix lists only revisions made in the most recent version. The scope of the revisions was limited to technical changes as shown in Table A-1.
  • Page 94 TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:...

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