Memory Request Priority
9.8.2
TMS320C6211/C6711 Memory Request Priority
Table 9–21. TMS320C6211/C6711 EMIF Prioritization of Requests
9-62
The 'C6211/C6711 has fewer interface requestors because the data memory
controller (DMC), program memory controller (PMC), and EDMA transactions
are processed by the EDMA. Other requestors include the hold interface and
internal EMIF operations, including mode register set (MRS) and refresh
(REFR).
Priority
Highest
Lowest
Requestor
External hold
Mode register set
refresh
EDMA – DMC
EDMA – PMC
EDMA – DMA