Expansion Bus Host Port Registers Description; Expansion Bus Data Register; Expansion Bus Internal Slave Address Register (Xbisa); Xbisa Register Description - Texas Instruments TMS320C6201 Reference Manual

8.5.1

Expansion Bus Host Port Registers Description

8.5.1.1 Expansion Bus Data Register

Figure 8–14. Expansion Bus Data Register
31
8.5.1.2 Expansion Bus Internal Slave Address Register
Figure 8–15. Expansion Bus Internal Slave Address Register (XBISA)
31
HRW,+0000 0000 0000 0000 0000 0000 0000 00
Table 8–14. XBISA Register Description
The expansion bus data (XBD) register, shown in Figure 8–14, contains the
data that was read from the memory accessed by the expansion bus host port
if the current access is a read, or the data that is written to the memory if the
current access is a write.
This register is used when expansion host port operates either in synchronous
or asynchronous mode.
HRW,+0000 0000 0000 0000 0000 0000 0000 0000
The expansion bus internal slave address (XBISA) register is used when the
external expansion bus master initiates data transfer. This register controls the
memory location in the DSP memory map being accessed by the external
mastering data transactions. This address is a 30-bit word address. The two
LSB bits in this register are used by the host to enable or disable autoincrement
of XBISA register, and to trigger the interrupt (by setting the DSPINT bit).The
XBISA register is shown in Figure 8–15 and described in Table 8–14.
XBSA
Field Description
DSPINT The external master to DSP interrupt. Used to wake up the DSP
from reset. This bit is cleared by corresponding bit in the XBHC.
AINC Enable autoincrement. (Asynchronous mode only)
AINC = 0: XBD register is accessed with autoincrement of XBSA
AINC = 1: XBD register is accessed without autoincrement of
XBSA 30-bit word address. The XBSA bit-field controls memory location
in the DSP memory map being accessed by the host.
Expansion Bus Host Port Operation
XBD
2
field.
XBSA field.
0
1 0
AINC DSPINT
HRW, +0 HRW, +0
Expansion Bus 8-23