Tms320C6202 Secondary Control Register; Synchronization Configuration Options - Texas Instruments TMS320C6201 Reference Manual

Figure 5–4. TMS320C6202 Secondary Control Register
31
15 14 13
WSYNC WSYNC RSYNC RSYNC
CLR STAT CLR STAT
RW, +0 RW, +0 RW, +0 RW, +0
Table 5–5. Synchronization Configuration Options
The DMA channel secondary control register of the 'C6202 has been expand-
ed to include three new fields: WSPOL, RSPOL, and FSIG. This field is used
to add control to a frame-synchronized data transfer. The 'C6202 secondary
control register is shown in Figure 5–4; the new field is shown in gray.
Table 5–5 describes the possible configurations of the new field.
Reserved
R, +0
12 11 10 9
WDROP WDROP RDROP
IE COND IE
RW, +0 RW, +0 RW, +0
Field Description
WSPOL/ Synchronization event polarity.
RSPOL
Selects the polarity of an external sync event:
1 = active low, 0 = active high
This field is valid only if EXT_INTx is selected.
FSIG Frame sync ignore.
Setting FSIG = 1 causes the DMA channel to
ignore any event transitions during a current
burst. Synchronization is level triggered instead
of edge triggered.
22 21 20
WSPOL RSPOL
RW, +0 RW, +0
8 7 6
RDROP BLOCK BLOCK LAST
COND IE COND IE
RW, +0 RW, +1 RW, +0 RW,+0
Direct Memory Access (DMA) Controller
DMA Registers
19 18
FSIG
RW, +0
5 4 3 2
LAST FRAME FRAME
COND IE COND
RW,+0 RW, +0 RW, +0
Section
16
DMAC
RW, +000
1 0
SX SX
IE COND
RW,+0 RW,+0
5.6.3
5.6.3
5-11