2.4 Data Memory Controller
Figure 2–3. TMS320C6x Block Diagram
As shown inFigure 2–3, the data memory controller connects:
The CPU and direct memory access (DMA) controller to internal data
memory and performs the necessary arbitration.
CPU to the external memory interface (EMIF).
The CPU to the on chip peripherals through the peripheral bus controller.
The peripheral bus controller performs arbitration between the CPU and DMA
for the on-chip peripherals.
Timers
Interrupt selector
MCSPs
HPI control
DMA control
EMIF control
Host port
PLL
Power
down
Boot
Configuration
TMS320C6201/C6701 Program and Data Memory
Peripheral
bus
controller
DMA
controller
EMIF
Data Memory Controller
Data memory
Data memory
controller
CPU core
Program fetch
Instruction dispatch
Instruction decode
Data path
Data path
1
2
Program memory controller
Program memory/cache
2-7