9.5.2
SBSRAM Writes
Figure 9–34. TMS320C6201/C6202/C6701 SBSRAM Four Word Write
Clock †
CEx
BE[3:0]
EA[21:2]
ED[31:0]
SSADS
SSOE
SSWE
† Clock=SSCLK for 'C6201/C6701.
Clock=CLKOUT2 for 'C6202.
Figure 9–34 shows a four-word write to an SBSRAM. Every access strobes a
new address into the SBSRAM. The first access requires an initial start-up pen-
alty of two cycles; thereafter, all accesses can occur in a single SSCLK cycle.
Write
Write
BE1
BE2
A1
A2
D1
D2
External Memory Interface
SBSRAM Interface
Write
Write
BE3
BE4
A3
A4
D3
D4
9-47